M67025E
update the data structure. Once the update is completed the data structure may be
released.
This allows the interpreting processor, to return to read the complete data structure, thus
ensuring a consistent data structure.
Truth Table
Table 1. Non Contention Read/Write Control
Note: Inputs(1)
Outputs
CS
H
X
L
R/W
X
OE
X
X
X
X
L
UB
X
H
H
L
LB
X
H
L
SEM
H
H
H
H
H
H
H
X
IO8 - IO15
Hi-Z
I/O0- I/O7
Hi-Z
Mode
Deselected: Power Down
Deselected: Power Down
Write to Lower Byte Only
Write to Both Bytes
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
X
Hi-Z
Hi-Z
L
Hi-Z
DATAIN
DATAIN
Hi-Z
L
L
L
DATAIN
DATAOUT
Hi-Z
L
H
H
H
X
L
H
L
L
L
H
L
DATAOUT
DATAOUT
Hi-Z
L
L
L
DATAOUT
Hi-Z
X
H
X
H
X
L
H
L
X
X
H
X
H
L
X
X
H
X
H
X
L
Outputs Disabled
H
H
L
DATAOUT
DATAOUT
DATAIN
DATAIN
–
DATAOUT
DATAOUT
DATAIN
DATAIN
–
Read Data in Sema. Flag
Read Data in Sema. Flag
Write DIN0 into Sema. Flag
Write DIN0 into Sema. Flag
Not Allowed
L
L
X
X
X
X
L
L
X
X
L
L
X
L
–
–
Not Allowed
Note:
1. AOL - A12 ≠ AOR n- A12R
Table 2. Arbitration Options
Inputs
LB
Outputs
BUSY
Options
CS
L
UB
X
L
M/S
SEM
H
INT
L
X
L
H
H
L
Output
–
Busy Logic Master
L
H
Signal
L
X
L
H
Input
–
–
Busy Logic Slave
Interrupt Logic
L
X
L
L
H
Signal
L
X
L
X
X
H
L
H
–
Output
Signal
–
L
X
X
X
H
H
H
X
X
L
H
Semaphore Logic(1)
L
Hi-Z
Note:
1. Inputs Signals are for Semaphore Flags set and test (Write and Read) operations.
8
4146J–AERO–06/03
ATMEL [ ATMEL ]
