Table 3. Interrupt Flag(1) (4)
Left Port
Right Port
OER AOR-A12R
R/WL
CSL
L
OEL
X
AOL-A12L
1FFF
X
INTL
X
R/WR
CSR
X
INTR Function
L
X
X
X
X
X
L
X
L
X
L(2)
H(3)
X
Set Right INTR Flag
X
X
X
L
1FFF
1FFE
X
Reset Right INTR Flag
Set Left INTL Flag
X
X
X
L(3)
H(2)
L
X
X
L
L
1FFE
X
X
X
Reset Left INTL Flag
Notes: 1. Assumes BUSYL = BUSYR = H.
2. If BUSYL = L, then NC.
3. If BUSYR = L, then NC.
4. H = HIGH, L = LOW, X = DON’T CARE, NC = NO CHANGE.
Table 4. Arbitration(2)
Left Port
Right Port
A0R – A12R
Flags (1)
CSL
H
A0L – A12L
CSR
H
BUSYL
BUSYR
Function
X
X
X
H
H
H
H
H
H
H
H
No Contention
No Contention
No Contention
No Contention
L
Any
X
H
H
L
Any
L
≠ A0R – A12R
L
≠ A0L – A12L
Address Arbitration With CS Low Before Address Match
L
L
L
L
LV5R
RV5L
Same
Same
L
L
L
L
LV5R
RV5L
Same
Same
H
L
L
H
L
L-Port Wins
R-Port Wins
H
L
Arbitration Resolved
Arbitration Resolved
H
CS Arbitration With Address Match Before CS
LL5R
RL5L
LW5R
LW5R
= A0R – A12R
= A0R – A12R
= A0R – A12R
= A0R – A12R
LL5R
RL5L
LW5R
LW5R
= A0L – A12L
= A0L – A12L
= A0L – A12L
= A0L – A12L
H
L
L
H
L
L-Port Wins
R-Port Wins
H
L
Arbitration Resolved
Arbitration Resolved
H
Notes: 1. INT Flags Don’t Care.
2. X = DON’T CARE, L = LOW, H = HIGH.
LV5R = Left Address Valid ≥ 5 ns before right address.
RV5L = Right Address Valid ≥ 5 ns before left address
Same = Left and Right Addresses match within 5 ns of each other.
LL5R = Left CS = LOW ≥ 5 ns before Right CS.
RL5L = Right CS = LOW ≥ 5 ns before left CS.
LW5R = Left and Right CS = LOW within 5 ns of each other.
9
M67025E
4146J–AERO–06/03
ATMEL [ ATMEL ]
