M67025E
The eight semaphore flags are located in a separate memory space from the dual-port
RAM in the M67025E. The address space is accessed by placing a low input on the
SEM pin (which acts as a chip select for the semaphore flags) and using the other control pins
(address, OE and R/W) as normally used in accessing a standard static RAM. Each of the flags
has a unique address accessed by either side through address pins A0-A2. None of the other
address pins has any effect when accessing the semaphores. Only data pin D0 is used when
writing to a semaphore. If a low level is written to an unused semaphore location, the flag will be
set to zero on that side and to one on the other side (see Table 5). The semaphore can now
only be modified by the side showing the zero. Once a one is written to this location from the
same side, the flag will be set to one for both sides (unless a request is pending from the other
side) and the semaphore can then be written to by either side.
The effect the side writing a zero to a semaphore location has of locking out the other
side is the reason for the use of semaphore logic in interprocessor communication. (A
thorough discussion of the use of this feature follows below). A zero written to the sema-
phore location from the locked-out side will be stored in the semaphore request latch for
that side until the semaphore is relinquished by the side having control. When a sema-
phore flag is read its value is distributed to all data bits so that a flag set at one reads as
one in all data bits and a flag set at zero reads as all zeros. The read value is latched
into the output register of one side when its semaphore select (SEM) and output enable
(OE) signals go active. This prevents the semaphore changing state in the middle of a read
cycle as a result of a write issued by the other side. Because of this latch, a repeated read of a
semaphore flag in a test loop must cause either signal (SEM or OE) to go inactive, otherwise
the output will never change.
The semaphore must use a WRITE/READ sequence in order to ensure that no system
level conflict will occur. A processor requests access to shared resources by attempting
to write a zero to a semaphore location. If the semaphore is already in use, the sema-
phore request latch will contain a zero, yet the semaphore flag will appear as a one, and
the processor will detect this status in the subsequent read (see Table 5). For example,
assume a processor writes a zero to the left port at a free semaphore location. On a
subsequent read, the processor will verify that it has written successfully to that location
and will assume control over the resource concerned. If a processor on the right side
then attempts to write a zero to the same semaphore flag it will fail, as will be verified by
a subsequent read returning a one from the semaphore location on the right side has a
READ/WRITE sequence been used instead, system conflict problems could have
occurred during the interval between the read and write cycles.
It must be noted that a failed semaphore request needs to be followed by either
repeated reads or by writing a one to the same location. The simple logic diagram for
the semaphore flag in Figure 2 illustrates the reason for this quite clearly. Two sema-
phore request latches feed into a semaphore flag. The first latch to send a zero to the
semaphore flag will force its side of the semaphore flag low and other side high. This
status will be maintained until a one is written to the same semaphore request latch.
Should a zero be written to the other side’s semaphore request latch in the meantime,
the semaphore flag will flip over to this second side as soon as a one is written to the
first side’s request latch. The second side’s flag will now stay low until its semaphore
request latch is changed to a one. Thus, clearly, if a semaphore flag is requested and
the processor requesting it no longer requires access to the resource, the entire system
can hang up until a one is written to the semaphore request latch concerned.
Semaphore timing becomes critical when both sides request the same token by
attempting to write a zero to it at the same time. Semaphore logic is specially conceived
to resolve this problem. The logic ensures that only one side will receive the token if
simultaneous requests are made. The first side to make a request will receive the token
where request do not arrive at the same time. Where they do arrive at the same time,
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4146J–AERO–06/03
ATMEL [ ATMEL ]
