AT7908E
SETUP_RX register and the IntClr bit in the SETUP_3 register (see how to clear inter-
rupt in the precedent paragraph).
Operation 5 and 6
Table 26. write reg 03 H, data =22Hex
(SETUP_3 register) Resynchronisation jump length = 2 system clock and clear interrupt
SETUP_3
RxClr
0
Reset
0
IntClr
0
AbortTx
0
Txreq
0
RSJ2
0
RSJ1
1
RSJ0
0
SETUP_3
RxClr
0
Reset
0
IntClr
0
AbortTx
0
Txreq
0
RSJ2
0
RSJ1
1
RSJ0
0
Operation 9
Table 27. write reg 04 H, data =04Hex
(SETUP_RX register)Clear rx ok and rx overrun bit of receiver message objects 3
SETUP_RX
Reserved
X
Reserved
X
Reserved
X
Reserved
X
Reserved
X
Rxclr3
0
Rxclr2
0
Rxclr1
0
SETUP_RX
Reserved
X
Reserved
X
Reserved
X
Reserved
X
Reserved
X
Rxclr3
0
Rxclr2
0
Rxclr1
0
After this operation, the RX3OK bit in STATUS_RX register will be cleared
STATUS_RX
STATUS_RX
reserved
X
Rxovr3
0
Rxovr2
0
Rxovr1
0
reserved
x
RXOK3
1
RXOK2
0
RXOK1
0
reserved
X
Rxovr3
0
Rxovr2
0
Rxovr1
0
reserved
0
RXOK3
0
RXOK2
0
RXOK1
0
If the MCU doesn’t clear the receiver message object status (principally the Rxok bit )
and the AT7908E receives a new message on the same message object (for example
the RX3 message object), the message will be stored in the message object; INT will be
generated (OVERRUN condition) and the STATUS_RX will be updated as following:
38
4268D–AERO–11/09
ATMEL [ ATMEL ]
