AX88179
USB 3.0 to 10/100/1000M Gigabit Ethernet Controller
6.2.3 Wakeup Frame Command Structure
Offset (byte)
0
Name
Description
expect_CRC_0_L
expect_CRC_0_H
expect_CRC_1_L
expect_CRC_1_H
expect_CRC_2_L
expect_CRC_2_H
expect_CRC_3_L
expect_CRC_3_H
expect_CRC_4_L
expect_CRC_4_H
expect_CRC_5_L
expect_CRC_5_H
expect_CRC_6_L
expect_CRC_6_H
expect_CRC_7_L
expect_CRC_7_H
last_byte_0
last_byte_1
last_byte_2
last_byte_3
last_byte_4
last_byte_5
last_byte_6
last_byte_7
The low byte of wakeup frame 0 CRC
The high byte of wakeup frame 0 CRC
The low byte of wakeup frame 1 CRC
The high byte of wakeup frame 1 CRC
The low byte of wakeup frame 2 CRC
The high byte of wakeup frame 2 CRC
The low byte of wakeup frame 3 CRC
The high byte of wakeup frame 3 CRC
The low byte of wakeup frame 4 CRC
The high byte of wakeup frame 4 CRC
The low byte of wakeup frame 5 CRC
The high byte of wakeup frame 5 CRC
The low byte of wakeup frame 6 CRC
The high byte of wakeup frame 6 CRC
The low byte of wakeup frame 7 CRC
The high byte of wakeup frame 7 CRC
The last masked byte of the wakeup frame 0
The last masked byte of the wakeup frame 1
The last masked byte of the wakeup frame 2
The last masked byte of the wakeup frame 3
The last masked byte of the wakeup frame 4
The last masked byte of the wakeup frame 5
The last masked byte of the wakeup frame 6
The last masked byte of the wakeup frame 7
Wakeup frame command 0 & 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
{command_1, command_0}
{command_3, command_2}
{command_5, command_4}
{command_7, command_6}
Mask_MEM_Offset
{4’d0, Mask_timer}
Mask_valid_length_0
Mask_valid_length_1
Mask_valid_length_2
Mask_valid_length_3
Mask_valid_length_4
Mask_valid_length_5
Mask_valid_length_6
Mask_valid_length_7
reply_TX_page_0
Wakeup frame command 2 & 3
Wakeup frame command 4 & 5
Wakeup frame command 6 & 7
Fix to 0x04
Mask wakeup event trigger to USB host timer
The valid length of the byte mask 0
The valid length of the byte mask 1
The valid length of the byte mask 2
The valid length of the byte mask 3
The valid length of the byte mask 4
The valid length of the byte mask 5
The valid length of the byte mask 6
The valid length of the byte mask 7
The TX buffer page for reply packet 0
The TX buffer page for reply packet 1
The TX buffer page for reply packet 2
The TX buffer page for reply packet 3
The TX buffer page for reply packet 4
The TX buffer page for reply packet 5
The TX buffer page for reply packet 6
The TX buffer page for reply packet 7
The low byte of calculated partial checksum of Ipv6 NA
The high byte of calculated partial checksum of Ipv6 NA
The low byte of calculated partial checksum of Ipv6 NA
The high byte of calculated partial checksum of Ipv6 NA
reply_TX_page_1
reply_TX_page_2
reply_TX_page_3
reply_TX_page_4
reply_TX_page_5
reply_TX_page_6
reply_TX_page_7
partial_chksum_0_L
partial_chksum_0_H
partial_chksum_1_L
partial_chksum_1_H
49
Copyright © 2011-2012 ASIX Electronics Corporation. All rights reserved.
ASIX [ ASIX ELECTRONICS CORPORATION ]
