APW7120
Application Information (Cont.)
dissipation, package selection and heatsink are the
Output Inductor Selection (Cont.)
dominantdesignfactors.Thepowerdissipationincludes
two loss components, conduction loss and switching
loss. The conduction lossesare the largest component
of power dissipation for both the high-side and the
low-side MOSFETs. These losses are distributed
between the two MOSFETs according to duty factor
(seetheequationsbelow).Onlythehigh-sideMOSFET
has switching losses, since the low-side MOSFETs
body diode or an external Schottky rectifier across
the lower MOSFET clamps the switching node before
the synchronous rectifier turns on. These equations
assume linear voltage-current transitions and do not
adequately model power loss due the reverse-recov-
ery of the low-side MOSFET’s body diode. The gate-
charge losses are dissipated by the APW7120 and
values reduce the converter’s response time to a load
transient.
Oneof theparameterslimitingtheconverter’sresponse
to a load transient is the time required to change the
inductor current. Given a sufficiently fast control loop
design, the APW7120 will provide either 0% or 85%
(Average) duty cycle in response to a load transient.
The response time is the time required to slew the
inductor current from an initial current value to the
transient current level.Duringthisintervalthe difference
between the inductor current and the transient current
level must be supplied by the output capacitor.
Minimizing the response time can minimize the output
capacitancerequired.
The response time to a transient is different for don’t heat the MOSFETs. However, large gate-charge
theapplication of load and the removal of load. The increases the switching interval, tSW which increases
followingequationsgivetheapproximateresponsetime the high-side MOSFET switching losses. Ensure that
interval for application andremoval of atransient load:
both MOSFETs are within their maximum junction
temperature athigh ambient temperatureby calculating
the temperature rise according to package thermal-
resistance specifications. A separate heatsink may
be necessary depending upon MOSFET power,
package type, ambient temperature and air flow.
L ×ITRAN
L ×ITRAN
tRISE =
,
tFALL =
VIN - VOUT
VOUT
where: ITRAN is the transient load current step, tRISE is
the response time to the application of load, and tFALL
is the response time to the removal of load. The worst
case response time can be either at the application or
removal of load. Be sure to check both of these
equationsatthetransientloadcurrent.Theserequirements
are minimum andmaximum output levelsfor theworst
case response time.
1
2
PHigh - Side = IOUT ×RDSON ×D + ×IOUT × VIN × tSW ×FOSC
2
2
PLow - Side = IOUT ×RDSON ×(1- D)
Where : tSW is the switching interval
Layout Considerations
MOSFET Selection
In high power switching regulator, a correct layout is
important to ensure proper operation of the regulator.
The APW7120 requires two N-Channel power
MOSFETs. These should be selected based upon
RDS(ON), gate supply requirements, and thermal
management requirements.
In general, interconnecting impedances should be
minimized by using short, wide printed circuit traces.
Signal and power groundsare to be kept separate and
In high-current applications, the MOSFET power
Copyright ã ANPEC Electronics Corp.
15
www.anpec.com.tw
Rev. A.4 - Jan., 2006
ANPEC [ ANPEC ELECTRONICS COROPRATION ]
