APW7120
Functional Description (Cont.)
Adaptive Shoot-Through Protection
time the LGATE is released to rise after a constant
The gate driver incorporates adaptive shoot-through delay.
protection to high-side and low-side MOSFETs from
Shutdown Control
conducting simultaneously and shorting the input
supply. This is accomplished by ensuring the falling
gate has turned off one MOSFET before the other is
allowed to rise.
Pulling the OCSET voltage below 0.15V by an open
drain transistor, shown in typical application circuit,
shuts down the APW7120 PWM controller. In shut-
down mode, the UGATE and LGATE are pulled to
PHASE and GND respectively, the output is floating.
During turn-off of the low-side MOSFET, the LGATE
voltage is monitored until it reaches a 1.5V threshold,
at which time the UGATE is released to rise after a
constant delay. During turn-off of the high-side
MOSFET, the UGATE-to-PHASE voltage is also
monitored until it reaches a 1.5V threshold, at which
Application Information
Input Capacitor Selection
For a through hole design, several electrolytic capacitors
may be needed. For surface mount designs, solid
tantalum capacitors can be used, but caution must
be exercised with regard to the capacitor surge current
rating.
Use small ceramic capacitors for high frequency
decoupling and bulk capacitors to supply the surge
currentneededeachtimehigh-sideMOSFET(Q1)turns
on. Place the small ceramic capacitors physically close
to the MOSFETs and between the drain of Q1 and the
source of low-side MOSFET(Q2).
VIN
The important parameters for the bulk input capacitor
are the voltage rating and the RMS current rating. For
reliable operation, select the bulk capacitor with voltage
and current ratings abovethe maximum input voltage
and largest RMS current required by the circuit. The
capacitor voltage rating should be at least 1.25 times
greater than themaximum input voltage and a voltage
rating of 1.5 times is a conservative guideline. The
RMS current of the bulk input capacitor is calculated
as the following equation :
IQ1
CIN
Q1
UGATE
IL
IOUT
VOUT
L
ESR
COUT
ICOUT
Q2
LGATE
IRMS = IOUT × D ×(1- D)
(A)
Copyright ã ANPEC Electronics Corp.
13
www.anpec.com.tw
Rev. A.4 - Jan., 2006
ANPEC [ ANPEC ELECTRONICS COROPRATION ]
