APA2057A
Application Information (Cont.)
power levels. Note that the efficiency of the amplifier is
quite low for lower power levels and rises sharply as
power to the load is increased resulting in nearly flat
internal power dissipation over the normal operating
range. Note that the internal dissipation at full output
power is less than in the half power range. Calculating
the efficiency for a specific system is the key to proper
power supply design. For a stereo 1W audio system with
8W loads and a 5V supply, the maximum draw on the
power supply is almost 3W.
Shutdown Function (Cont.)
SET pin. The trigger point between a logic high and logic
low level is typically 2.0V. It is the best to switch be-
tween ground and the supply VDD to provide maximum
device performance.
By switching the SET pin to low, the amplifier enters a
low-current consumption state, IDD<80mA. Even the
APA2057A is in shutdown mode, PC_BEEP will keep
detecting circuit. In normal operating, SET pin is pulled
to high level to keep the IC out of the shutdown mode.
The SET pin should be tied to a definite voltage to
avoid unwanted state changes.The wake-up time of shut-
down is about 150ms, and the shutdown release’s
pop is caused by the operational amplifier’s offset.
Po (W)
0.25
Efficiency (%)
31.25
IDD(A) VPP(V) PD (W)
0.16
0.21
0.30
0.32
2.00
2.83
4.00
4.47
0.55
0.55
0.5
0.50
47.62
1.00
66.67
1.25
78.13
0.35
PC-BEEP Detection
**High peak voltages cause the THDD+toNintocrinecarseea.se
Table 2. Efficiency vs. Output Power in 5-V/8W Differential
Amplifier Systems.
The APA2057A integrates a PCBEEP circuit detec-
tion for notebook PC using. When PC-BEEP signal
drives to PCBEEP input pin, PCBEEP mode is active.
The APA2057A will turn on speaker drivers and the inter-
nal gain is fixed as 0dB. The PCBEEP signal becomes
A final point to remember about linear amplifiers is how
to manipulate the terms in the efficiency equation to
utmost advantage when possible. Note that in equation,
VDD is in the denominator. This indicates that as VDD goes
down, efficiency goes up. In other words, using the effi-
ciency analysis to choose the correct supply voltage
and speaker impedance for the application.
v
the amplifiers input signal. If the amplifiers in the shut-
down mode, it will be out of shutdown mode whenever
PCBEEP mode is enabled. The APA2057A will return to
previous setting when it is out of PC BEEP mode. The
input impedance is 100KW on PCBEEP input pin.
Power Dissipation
Speaker Driver Amplifier Efficiency
Whether the power amplifier is operated in BTL or SE
modes, power dissipation is a major concern. Equation 8
states the maximum power dissipation point for a SE
mode operating at a given supply voltage and driving a
An easy-to-use equation to calculate efficiency starts out
as being equal to the ratio of power from the power
supply to the power delivered to the load. The following
equations are the basis for calculating amplifier efficiency.
PO
specified load.
2
VDD
PD,MAX
=
(8)
2pRL
SE mode:
Efficiency =
(3)
Psup
In BTL mode operation, the output voltage swing is
doubled as in SE mode. Thus the maximum power
dissipation point for a BTL mode operating at the same
Where:
PO =
VOrms * VOrms
(VP * VP )
2RL
=
(4)
(5)
(6)
RL
VP
given conditions is 4 times as in SE mode.
2
VOrms =
4VDD
(9)
2
PD,MAX
=
BTL mode:
2p2RL
2VP
Psup = VDD *IDD(AVG) = VDD
*
pRL
Efficiency of a Differential configuration:
Since the APA2057A is a dual channel power amplifier,
the maximum internal power dissipation is 2 times that
both of equations depending on the mode of operation.
Even with this substantial increasing in power dissipation,
the APA2057A does not require extra heatsink. The
ì
í
î
ü ì
ü
ý
þ
PO
(VP * VP )
2RL
2VP
pRL
=
/ V
*
=
(7)
ý í
þ î
DD
Psup
pRL
4VDD
Table 1 calculates efficiencies for four different output
Copyright ã ANPEC Electronics Corp.
24
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Rev. A.1 - Aug., 2007
ANPEC [ ANPEC ELECTRONICS COROPRATION ]
