欢迎访问ic37.com |
会员登录 免费注册
发布采购

APA2057AQBI-TRL 参数 Datasheet PDF下载

APA2057AQBI-TRL图片预览
型号: APA2057AQBI-TRL
PDF下载: 下载PDF文件 查看货源
内容描述: 2.4W立体声音频功率放大器(带增益设置)和无电容耳机驱动器 [2.4W Stereo Audio Power Amplifier (with Gain Setting) & Capfree Headphone Driver]
分类和应用: 驱动器商用集成电路放大器功率放大器
文件页数/大小: 31 页 / 892 K
品牌: ANPEC [ ANPEC ELECTRONICS COROPRATION ]
 浏览型号APA2057AQBI-TRL的Datasheet PDF文件第18页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第19页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第20页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第21页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第23页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第24页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第25页浏览型号APA2057AQBI-TRL的Datasheet PDF文件第26页  
APA2057A  
Application Information (Cont.)  
drive.  
Charge Pump Output Capacitor  
·
·
Both amplifier and headphone “ON” mode: Pull low  
the AMP_EN and pull high the HP_EN control pins,  
then turn on both speaker drivers and headphone  
drivers  
The output capacitor (CCPO)’s value affects the power  
ripple directly at CVSS(VSS). Increasing the value of output  
capacitor reduces the power ripple. The ESR of output  
capacitor affects the load transient of CVSS(VSS). Lower  
ESR and greater than 1mf ceramic capacitor (X7R type  
is recommended) is recommendation.  
Both amplifier and headphone “OFF” mode: Pull  
high the AMP_EN and pull low the HP_EN control  
pins, then turn off both speaker drivers and head-  
phone drivers  
Charge Pump Bypass Capacitor  
The bypass capacitor (CCPB) relates with the charge pump  
switching transient. The capacitor’s value is same as  
flying capacitor (1mf). Place it close to the CVDD and PGND.  
If the AMP_EN and HP_EN are connected together, then  
this pin will be connected to headphone jack’s control  
pin (Figure 3), the APA2057A is switchable between “Am-  
plifier mode (Headphone mute), or Headphone mode  
(Amplifier mute).  
Headphone Detection Input  
HP_R  
Control pin  
Ring  
1KW  
Gain Setting  
The gain for speaker drivers can be adjustable by apply-  
ing DC voltage to SET pin. The APA2057A control con-  
sists 19 step gain settings from 2.0V~ 4.2V, and the gain  
is from -7dB to 16dB. Each gain step corresponds to a  
specific input voltage range, as shown in “Gain Setting  
Table”. To minimize the effect of noise on the gain setting  
control, which can affect the selected gain level, hyster-  
esis and clock delay are implemented. For the highest  
accuracy, the voltage shown in the “recommended volt-  
age” column of the table is used to select a desired gain.  
This recommended voltage is exactly halfway between  
the two nearest transitions. The amount of hysteresis  
corresponds to half of the step width, as shown in Fig-  
ure 4. Apply 0V to SET pin will place the APA2057A into  
shutdown mode, and when SD =5V, it allows the speaker  
HPD_Switch  
HP_EN  
HP_L  
1KW  
Sleeve  
Tip  
Headphone Detection  
Headphone Jack with swich  
Figure 3 HPD configurations  
The HP_EN will detect the voltage. If the voltage is  
less than 0.8V, the headphone amplifiers will be disabled;  
if greater than 2V, then the headphone amplifier will be  
enabled.  
In Figure 3, phone-jack with the control pin is used and  
connected to HP_EN input from control pin. When a  
headphone plug is inserted, the HP_EN will pull high  
internally which enables headphone amplifiers; with-  
out headphone plug, the HP_EN is pulled to GND.  
driver at a fixed gain (AV=10.5dB).  
20  
10  
0
Forward  
Operation Mode  
Backward  
The APA2057A amplifier has two pairs of independent  
amplifier. One for stereo speaker is BTL structure, and  
the other for headphone is cap-less structure. Each pair  
has independent input pin; INR_A and INA_L are for ste-  
reo speaker drivers, and INR_H and INL_H are for  
stereo headphone drivers.  
-10  
-20  
-30  
-40  
-50  
-60  
-70  
·
Amplifier mode operation: Pull low the AMP_EN  
control pin can enable the stereo speaker driver.  
Headphone mode operation: Pull high the HP_EN  
control pin can enable the cap-less headphone  
3.  
0
0.0  
1.0  
2.0  
4.0  
5.0  
·
DC Volume (V)  
Figure 4: APA2057A Gain setting vs. SET pin Voltage  
Copyright ã ANPEC Electronics Corp.  
22  
www.anpec.com.tw  
Rev. A.1 - Aug., 2007  
 复制成功!