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PEEL18CV8ZJI-25 参数 Datasheet PDF下载

PEEL18CV8ZJI-25图片预览
型号: PEEL18CV8ZJI-25
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS可编程电可擦除逻辑器件 [CMOS Programmable Electrically Erasable Logic Device]
分类和应用: 可编程逻辑输入元件时钟
文件页数/大小: 10 页 / 442 K
品牌: ANACHIP [ ANACHIP CORP ]
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Design Security  
Programming Support  
The PEEL™18CV8Z provides a special EEPROM security bit  
that prevents unauthorized reading or copying of designs pro-  
grammed into the device. The security bit is set by the PLD pro-  
grammer, either at the conclusion of the programming cycle or as a  
separate step, after the device has been programmed. Once the  
security bit is set it is impossible to verify (read) or program the  
PEEL™ until the entire device has first been erased with the  
bulk-erase function.  
Anachip’s JEDEC file translator allows easy conversion of exist-  
ing 20 pin PLD designs to the PEEL™18CV8Z, without the need  
for redesign. Anachip also offers (for free) its proprietary Win-  
PLACE software, an easy-to-use entry level PC-based software  
development system.  
Programming support includes all the popular third party pro-  
grammers such as BP Microsystems, System General, Logical  
Devices, and numerous others.  
Signature Word  
The signature word feature allows a 64-bit code to be pro-  
grammed into the PEEL™18CV8Z if the software option is used.  
The code can be read back even after the security bit has been set.  
The signature word can be used to identify the pattern pro-  
grammed into the device or to record the design revision, etc.  
Anachip Corp.  
www.anachip.com.tw  
Rev. 1.0 Dec 16, 2004  
6/10  
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