tion, registered feedback allows for the internal latching of states
without giving up the use of the external output.
the I/O pin. Otherwise, the output buffer is switched into the
high-impedance state.
Under the control of the output enable term, the I/O pin can func-
tion as a dedicated input, a dedicated output, or a bi-directional I/ O.
Opening every connection on the output enable term will per-
manently enable the output buffer and yield a dedicated output.
Conversely, if every connection is intact, the enable term will
always be logically false and the I/O will function as a dedicated
input.
Programmable Clock Options
A unique feature of the PEEL™18CV8Z is a programmable
clock multiplexer that allows the user to select true or comple-
ment forms of either input pin or product-term clock sources.
Zero Power Feature
The CMOS PEEL™18CV8Z features “Zero-Power” standby
operation for ultra-low power consumption. With the “Zero-
Power” feature, transition-detection circuitry monitors the inputs,
I/Os (including CLK) and feedbacks. If these signals do not
change for a period of time greater than approximately two tPD’s,
the outputs are latched in their current state and the device auto-
matically powers down. When the next signal transition is
detected, the device will “wake up” for active operation until the
signals stop switching long enough to trigger the next power-
down. (Note that the tPD is approximately 5 ns. slower on the first
transition from sleep mode.)
Input/Feedback Select
The PEEL™18CV8Z macrocell also provides control over the
feedback path. The input/feedback signal associated with each I/ O
macrocell can be obtained from three different locations; from the
I/O input pin, from the Q output of the flip-flop (registered
feedback), or directly from the OR gate (combinatorial feed-
back).
Bi-directional I/O
The input/feedback signal is taken from the I/O pin when using the
pin as a dedicated input or as a bi-directional I/O. (Note that it is
possible to create a registered output function with a bi-direc-
tional I/O, refer to Figure 9).
As a result of the “Zero-Power” feature, significant power sav-
ings can be realized for combinatorial or sequential operations
when the inputs or clock change at a modest rate. See Figure 5.
Combinatorial Feedback
Figure 10 Typical ICC vs. Input Clock Frequency
for the 18CV8Z
The signal-select multiplexer gives the macrocell the ability to
feedback the output of the OR gate, bypassing the output buffer,
regardless of whether the output function is registered or combi-
natorial. This feature allows the creation of asynchronous latches,
even when the output must be disabled. (Refer to configurations
5, 6, 7, and 8 in Figure 11.)
100
10
Figure 9 Block Diagram of the PEEL™18CV8Z
I/O Macrocell
1
Registered Feedback
0.1
Feedback also can be taken from the register, regardless of
whether the output function is programmed to be combinatorial
or registered. When implementing a combinatorial output func-
0.01
0.001
0.001
0.01
0.1
1
10
Frequency in MHz
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Dec 16, 2004
4/10
ANACHIP [ ANACHIP CORP ]
