AS1538/AS1540
Data Sheet - Application Information
9 Application Information
Initiating a Conversion
After the AS1538/AS1540 has been write-addressed by the bus master, the A/D converter circuitry is powered on, and
conversions will begin when a command byte bit C0 (see Command Byte on page 12) is received. If the address byte
is valid, the AS1538/AS1540 will return an ACK.
Reading Data
Data can be read from the AS1538/AS1540 by read-addressing the device (LSB of address byte set to 1 (see Com-
mand Byte on page 12)) and receiving the transmitted bytes. Converted data can only be read from the AS1538/
AS1540 once a conversion has been initiated as described in Initiating a Conversion.
Each 12-bit data word (see Figure 27) is returned in two bytes, where D11 is the MSB of the data word, and D0 is the
LSB. Byte 0 is sent first, followed by Byte 1.
Figure 27. Data Word
MSB
0
6
0
5
0
4
0
3
2
1
LSB
D8
Byte 0
Byte 1
D11
D10
D9
D7
D6
D5
D4
D3
D2
D1
D0
Figure 28 illustrates the interaction between the master and the slave AS1538/AS1540.
The most efficient way to perform continuous conversions is to issue repeated STARTs to the AS1538/AS1540 (to
secure the bus for subsequent ADC conversions) after reading each conversion. It is recommended that during the
conversion mode no data is clocked into the ADC to prevent internal noise. Therefore, after the repeated start com-
mend it is recommanded not to clock in or out any data from the converter for 3.7µs. The ADC powers up after the PD0
bit is clocked in and it takes 1.4µs to fully power up. At a clock frequency of 3.4MHz this time is automatically achieved
and no extra delay should be included.
Figure 28. Read Sequence
ADC Powerdown Mode
A1 A0 A
ADC Sampling Mode
A
S
1
0
0
1
0
SD C2 C1 C0 PD1 PD0
X
X
W
Write-Addressing Byte
Command Byte
ADC Conversion Mode
ADC Powerdown Mode *
Sr
1
0
0
1
0
A1 A0
R
A
0
0
0
0
D11 D10 D9 D8
A
D7 D6 ... D1 D0
N
P
3.7µs
Read-Addressing Byte
Use repeated STARTs to secure the
bus operation and loop back to the
stage of write-addressing for the
next conversion.
From Master to Slave
From Slave to Master
* Dependant on powerdown selection bits PD0 and PD1
Where:
A: Acknowledge (SDA Low)
N: Not Acknowledge (SDA High)
S: START Condition
P: STOP Condition
Sr: Repeated START Condition
W: 0 (Write)
R: 1 (Read)
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