AS1538/AS1540
Data Sheet - Application Information
When using the internal reference:
1. Bit PD1 off the command byte must always be set to logic 1 for each sample conversion that is issued by the
sequence, as shown in Figure 28 on page 14.
2. In order to achieve 12-bit accuracy conversion when using the internal reference, the internal reference set-
tling time must be considered.
If bit PD1 has been set to logic 0 while using the AS1538/AS1540, then the settling time must be reconsidered
after PD1 is set to logic 1 (i.e., whenever the internal reference is turned on after it has been turned off, the set-
tling time must be long enough to get 12-bit accuracy conversion).
3. When the internal reference is off, it is not turned on until both the first command byte with PD1 = 1 is sent and
then a STOP condition or repeated START condition is issued. (The actual turn-on time occurs once the STOP
or repeated START condition is issued.) Any command byte with PD1 = 1 issued after the internal reference is
turned on serves only to keep the internal reference on. Otherwise, the internal reference would be turned off
by any command byte with PD1 = 0.
The example in Figure 29 can be generalized for a conversion cycle by simply swapping the timing of the conversion
cycle.
Note: If an external reference is used, PD1 must be set to 0, and the external reference must be settled. The typical
sequence in Figure 28 on page 14 or Figure 29 on page 15 can then be used.
Layout
For optimum performance, care should be taken with the physical layout of the AS1538/AS1540 circuitry. The basic
SAR architecture is sensitive to glitches or sudden changes on the power supply, reference, ground connections, and
digital inputs that occur just prior to latching the output of the analog comparator. Therefore, during any single conver-
sion for an n-bit SAR converter, there are n windows in which large external transient voltages can easily affect the
conversion result. Such glitches might originate from switching power supplies, nearby digital logic, and high-power
devices.
- Power to the AS1538/AS1540 should be clean and well-bypassed. A 0.1µF ceramic bypass capacitor should be
placed as close to the device as possible. A 1 to 10µF capacitor may also be needed if the impedance of the con-
nection between +VDD and the power supply is high.
- The AS1538/AS1540 architecture offers no inherent rejection of noise or voltage variation in regards to using an
external reference input. This is of particular concern when the reference input is tied to the power supply. Any
noise and ripple from the supply will appear directly in the digital results.
- While high-frequency noise can be filtered out, voltage variation due to line frequency (50 or 60Hz) can be difficult
to remove.
- The GND pin should be connected to a clean ground point. In many cases, this will be the analog ground. Avoid
connections that are too near the grounding point of a microcontroller or digital signal processor.
- The ideal layout will include an analog ground plane dedicated to the converter and associated analog circuitry.
Note: For additional information download the evaluation board application note on our website.
www.austriamicrosystems.com
Revision 1.03
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