AS1536/AS1537
Datasheet - Package Drawings and Markings
10 Package Drawings and Markings
Figure 38. 8-pin SOIC-150 Package
Notes:
Symbol
Min
0.10
0.36
0.19
4.80
3.81
Max
0.25
0.46
0.25
4.98
3.99
1. Lead coplanarity should be 0 to 0.10mm (.004”) max.
A1
B
C
D
E
e
H
h
L
2. Package surface finishing:
(2.1) Top: matte (charmilles #18-30).
(2.2) All sides: matte (charmilles #18-30).
(2.3) Bottom: smooth or matte (charmilles #18-30).
1.27BSC
0.53REF
5.80
0.25
.041
1.52
0º
6.20
0.50
1.27
1.72
8º
3. All dimensions exclusive of mold flash, and end flash from the pack-
age body shall not exceed 0.24mm (0.10”) per side (D).
4. Details of pin #1 identifier are optional but must be located within
the zone indicated.
A
ZD
A2
1.37
1.57
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