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AS1358_04 参数 Datasheet PDF下载

AS1358_04图片预览
型号: AS1358_04
PDF下载: 下载PDF文件 查看货源
内容描述: 150毫安/ 300毫安,超低噪声,高PSRR低压降稳压器 [150mA/300mA, Ultra-Low-Noise, High-PSRR Low Dropout Regulators]
分类和应用: 稳压器
文件页数/大小: 17 页 / 1308 K
品牌: AMSCO [ AMS(艾迈斯) ]
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AS1358 / AS1359  
Datasheet - Application Information  
Total Thermal Path Resistance:  
RJA = RJC + RCS + RSA  
(EQ 6)  
(EQ 7)  
Junction Temperature (TJºC) is determined by:  
TJ = PDMAXRJA+ TAMB ºC  
9.5 Explanation of Steady State Specifications  
9.5.1 Line Regulation  
Line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. It is a measure of the  
regulator’s ability to maintain a constant output voltage when the input voltage changes. Line regulation is a measure of the DC open loop gai
of the error amplifier. More generally:  
VOUT  
VIN  
----------------  
Line Regulation =  
and is a pure number  
EQ 8)  
In practise, line regulation is referred to the regulator output voltage in terms of % / VOUT. This is particularly useful whethe sme regulator is  
available with numerous output voltage trim options.  
VOUT  
---------------- ---------  
00  
VIN VUT  
Line Regulation =  
% V  
(EQ 9)  
9.5.2 Load Regulation  
Load regulation is defined as the change of the output voltage when the ld current is changed by a kown quantity. It is a measure of the  
regulator’s ability to maintain a constant output voltage when the load changes. Load regulatin is a measure of the DC closed loop output  
resistance of the regulator. More generally:  
VOUT  
IOUT  
---------------  
Load Regulaon =  
and is unif ohs ()  
(EQ 10)  
In practise, load regulation is referred to the regulatooutput voltage in termof % mA. This is particularly useful when the same regulator is  
available with numerous output voltage trim op.  
VO
----------------------------  
100  
Load Regulation =  
% / mA  
(EQ 11)  
IOUT VOUT  
9.5.3 Setting Accuracy  
The regulator is supplied pre-trimmed, so that the output oltage accuracy is fully defined in the output voltage specification.  
9.5.4 Total Accuracy  
Away from dropout, total steady state acracy the sum of setting accuracy, load regulation and line regulation. Generally:  
Total % Accracy = Setting % Accuracy + Load Regulation % + Line Regulation %  
(EQ 12)  
9.6 Explanation of Dnamic Specifications  
9.6.1 Power SupplRejection Ratio (PSRR)  
Known also as Rpple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a  
summation of the ndivual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in  
the form opical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low  
qescent rreconditions. Generally:  
VOUT  
---------------  
PSSR = 20Log  
dB using lower case to indicate AC values  
(EQ 13)  
VIN  
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.  
www.austriamicrosystems.com  
Revision 1.5  
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