AS1152
austriamicrosystems
Data Sheet
Pin Assignments
7 Pinout and Packaging
Pin Assignments
Figure 16. AS1152 Pin Assignments (Top View)
EN
IN1
1
2
3
4
5
6
7
8
OUT1-
OUT1+
OUT2+
OUT2-
OUT3-
OUT3+
OUT4+
OUT4-
16
15
14
13
12
11
10
9
IN2
VCC
GND
IN3
AS1152
IN4
ENn
TSSOP
Pin Descriptions
Table 4. AS1152 Pin Descriptions
Pin Number
Pin Name
Description
Driver Enable Input. Internally pulled down to GND.
When EN = high and ENn = low or open, the driver outputs are active. For other
combinations of EN and ENn, the outputs are disabled and in high impedance.
1
EN
LVTTL/LVCMOS Driver Input
LVTTL/LVCMOS Driver Input
2
3
IN1
IN2
Power Supply Input. Bypass VCC to GND with 0.1µF and 0.001µF ceramic
capacitors.
4
VCC
Ground
5
6
7
GND
IN3
LVTTL/LVCMOS Driver Input
LVTTL/LVCMOS Driver Input
IN4
Driver Enable Input. Internally pulled down to GND.
When EN = high and ENn = low or open, the driver outputs are active. For other
combinations of EN and ENn, the outputs are disabled and in high impedance.
8
ENn
Inverting LVDS Driver Output
Noninverting LVDS Driver Output
Noninverting LVDS Driver Output
Inverting LVDS Driver Output
Inverting LVDS Driver Output
Noninverting LVDS Driver Output
Noninverting LVDS Driver Output
Inverting LVDS Driver Output
9
OUT4-
OUT4+
OUT3+
OUT3-
OUT2-
OUT2+
OUT1+
OUT1-
10
11
12
13
14
15
16
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