AS1152
austriamicrosystems
Data Sheet
Figure 20. Driver VOD and VOS Test Circuit
OUTx+
RL/2
RL/2
VCC
INx
VOS
VOD
GND
OUTx-
Figure 21. Driver High Impedance Delay Waveforms
3V
0
EN when ENn = 0 or Open
1.5V
1.5V
3V
0
1.5V
1.5V
ENn when EN = VCC
tPZH
tPHZ
OUTx+ When INx = VCC
OUTx- When INx = 0
VOH
50%
50%
50%
1.2V
1.2V
50%
OUTx+ When INx = 0
OUTx- When INx = VCC
VOL
tPZL
tPLZ
Figure 22. Driver High-Impedance Delay Test Circuit
OUTx+
RL/2
VCC
INx
GND
+1.2V
RL/2
Generator
EN
OUTx-
ENn
50Ω
1/4 AS1152
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Revision 1.00
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