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A3525BC21O22TRA 参数 Datasheet PDF下载

A3525BC21O22TRA图片预览
型号: A3525BC21O22TRA
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的音频处理器系统 [Advanced Audio Processor System]
分类和应用:
文件页数/大小: 194 页 / 3286 K
品牌: AMSCO [ AMS(艾迈斯) ]
 浏览型号A3525BC21O22TRA的Datasheet PDF文件第186页浏览型号A3525BC21O22TRA的Datasheet PDF文件第187页浏览型号A3525BC21O22TRA的Datasheet PDF文件第188页浏览型号A3525BC21O22TRA的Datasheet PDF文件第189页浏览型号A3525BC21O22TRA的Datasheet PDF文件第190页浏览型号A3525BC21O22TRA的Datasheet PDF文件第192页浏览型号A3525BC21O22TRA的Datasheet PDF文件第193页浏览型号A3525BC21O22TRA的Datasheet PDF文件第194页  
AS3525-A/-B C22O22  
Data Sheet, Confidential  
S.No  
.
Start (Base)  
End Address  
Actual  
Peripheral  
Reserved  
External Memory IF  
(MPMC Bank2 –  
External LCD Controller)  
Reserved  
External Memory IF  
(MPMC Bank 4 –  
SDRAM)  
External Memory If  
(MPMC Bank5 –  
SDRAM)  
Comment  
Address  
Block Size  
0x1100_0000  
0x2000_0000  
0x1FFF_FFFF  
0x203F_FFFF  
4 MB  
0x2100_0000  
0x3000_0000  
0x2FFF_FFFF  
0x3FFF_FFFF  
256 MB  
256 MB  
0x4000_0000  
0x4FFF_FFFF  
0x5000_0000  
0x8000_0000  
0x8002_0000  
0x8100_0000  
0x8105_0000  
0xC000_0000  
0xC002_0000  
0xC100_0000  
0xC105_0000  
0xC600_0000  
0xC601_0000  
0xC602_0000  
0xC603_0000  
0xC604_0000  
0xC605_0000  
0x7FFF_FFFF  
0x8001_FFFF  
0x80FF_FFFF  
0x8104_FFFF  
0xBFFF_FFFF  
0xC001_FFFF  
0xC0FF_FFFF  
0xC104_FFFF  
0xC5FF_FFFF  
0xC600_FFFF  
0xC601_FFFF  
0xC602_FFFF  
0xC603_FFFF  
0xC604_FFFF  
0xC605_FFFF  
Reserved  
Internal ROM  
Reserved  
Embedded 1T-RAM  
Reserved  
Internal ROM  
Reserved  
Embedded 1T-RAM  
Reserved  
USB2.0 Slave  
VIC  
DMAC Slave  
ExtMemIFSlave  
MemoryStick Slave  
CompactFlash/IDE  
Slave  
128 KByte  
320 KByte  
128 KByte  
320 KByte  
Aliased  
Aliased  
Aliased  
Aliased  
Few  
Few  
Few  
Few  
Few  
Few  
0xC606_0000  
0xC607_0000  
0xC606_FFFF  
0xC7FF_FFFF  
4 KByte  
ARM922T Slave  
Reserved  
APB blocks  
0xC800_0000  
0xC800_FFFF  
Few  
Nand Flash / Smart  
Media Interface  
BistManager  
SD-MCI  
Reserved  
Timer  
Watchdog Timer  
I2C Master/Slave  
I2C Audio Master  
SSP  
I2S IN Interface  
I2S OUT Interface  
GPIO A  
GPIO B  
GPIO C  
GPIO D  
Clock Generation Unit  
Chip Control Unit  
Debug UART  
DBOP  
0xC801_0000  
0xC802_0000  
0xC803_0000  
0xC804_0000  
0xC805_0000  
0xC806_0000  
0xC807_0000  
0xC808_0000  
0xC809_0000  
0xC80A_0000  
0xC80B_0000  
0xC80C_0000  
0xC80D_0000  
0xC80E_0000  
0xC80F_0000  
0xC810_0000  
0xC811_0000  
0xC812_0000  
0xC813_0000  
0xC801_FFFF  
0xC802_FFFF  
0xC803_FFFF  
0xC804_FFFF  
0xC805_FFFF  
0xC806_FFFF  
0xC807_FFFF  
0xC808_FFFF  
0xC809_FFFF  
0xC80A_FFFF  
0xC80B_FFFF  
0xC80C_FFFF  
0xC80D_FFFF  
0xC80E_FFFF  
0xC80F_FFFF  
0xC810_FFFF  
0xC811_FFFF  
0xC812_FFFF  
0xC813_FFFF  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
Few  
reserved  
9.2 Register definitions  
This section gives a short overview of all module registers.  
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.  
www.austriamicrosystems.com Revision 1.13  
191 - 194  
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