AS3525-A/-B C22O22
Data Sheet, Confidential
7.4.22
2-Wire-Serial Control Interface
7.4.22.1 General
There is an I2C slave block implemented to have access to 64 byte of setting information.
The I2C address is: Adr_Group8 - audio processors
•
•
8Ch_write
8Dh_read
Figure 59 I2C timing
7.4.22.2 Parameter
Table 158 I2C Operating Conditions
Symbol
VIL
Parameter
Notes
CSCL, CSDA (max 30%DVDD)
CSCL, CSDA (min 70%DVDD)
CSCL, CSDA
Min
0
Typ
Max
0.87
5.5
Unit
V
Input low voltage
Input high voltage
Hysteretic
VIH
2.03
200
V
HYST
VOL
Tsp
450
-
800
0.4
mV
V
Output low voltage
Spike insensitivity
Clock high time
Clock low time
Data setup time
CSDA @3mA
50
100
ns
ns
ns
ns
TH
500
500
100
TL
TSU
CSDA has to change TSU before rising
edge of CSCL
THD
TS
Data hold time
No hold time needed for CSDA relative
to rising edge of CSCL
0
ns
ns
ns
Clock start-condition hold time CSCL HIGH hold time relative to
CSDA edge for start/stop/rep_start
Output delay
200
24
TPD
CSDA propagation delay relative to
low going edge of CSCL
50
80
DVDD =2.9V, Tamb=25ºC; unless otherwise specified
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