欢迎访问ic37.com |
会员登录 免费注册
发布采购

A3525BC21O22TRA 参数 Datasheet PDF下载

A3525BC21O22TRA图片预览
型号: A3525BC21O22TRA
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的音频处理器系统 [Advanced Audio Processor System]
分类和应用:
文件页数/大小: 194 页 / 3286 K
品牌: AMSCO [ AMS(艾迈斯) ]
 浏览型号A3525BC21O22TRA的Datasheet PDF文件第161页浏览型号A3525BC21O22TRA的Datasheet PDF文件第162页浏览型号A3525BC21O22TRA的Datasheet PDF文件第163页浏览型号A3525BC21O22TRA的Datasheet PDF文件第164页浏览型号A3525BC21O22TRA的Datasheet PDF文件第166页浏览型号A3525BC21O22TRA的Datasheet PDF文件第167页浏览型号A3525BC21O22TRA的Datasheet PDF文件第168页浏览型号A3525BC21O22TRA的Datasheet PDF文件第169页  
AS3525-A/-B C22O22  
Data Sheet, Confidential  
7.4.20.4 Parameter  
Table 153 ADC10 Parameter  
Symbol  
Parameter  
Notes  
Min  
Typ  
Max  
Unit  
RDIV  
Input Divider Resistance  
CHG_OUT, RTCSUP, VBUS, CHG_IN, 138k  
180k  
234k  
Ω
VBAT  
ADCFS  
Ratio1  
Ratio2  
Gain  
ADC Full Scale Range  
Divition Factor 1  
2.534  
2.56  
0.2  
0.4  
2.5  
34  
2.586  
0.202  
0.404  
2.525  
50  
V
1
CHG_OUT, RTCSUP, VBUS, CHG_IN  
VBAT  
0.198  
0.396  
2.475  
-
Divition Factor 2  
1
ADC Gain Stage  
V
TCON  
Conversion Time  
µs  
mA  
I_MICFS  
I_MicSup1/2 Full Scale Range  
0.7  
1.0  
1.4  
BVDD=3.6V; Tamb=25ºC; unless otherwise specified  
7.4.20.5 Register Description  
Table 154 ADC10 Related Register  
Name  
Base  
Offset  
Description  
Interrupt settings for end of conversion interrupt  
IRQ_ENRD_2  
I2C audio master  
0x27  
Table 155 ADC_0 Register  
Name  
ADC_0  
Base  
Default  
I2C audio master  
0000 00xx  
First 10-bit ADC Register  
Offset: 0x2E  
Writing to this register will start the measurement of the selected source.  
This register is reset at a DVDD-POR, exception are bit 8 and 9.  
Bit  
Bit Name  
ADC_Source  
Default  
Access  
Bit Description  
Selects ADC input source  
7:4  
00000000 R/W  
0000: CHG_OUT  
0001: RTCSUP  
0010: VBUS  
0011: CHG_IN  
0100: CVDD  
0101: BatTemp  
0110: MicSup1  
0111: MicSup2  
1000: VBE_1uA  
1001: VBE_2uA  
1010: I_MicSup1  
1011: I_MicSup2  
1100: VBAT  
1101: reserved  
1110: reserved  
1101: reserved  
do not change  
ADC result bit 9 to 8  
3:2  
1:0  
-
00  
xx  
n/a  
R/W  
ADC<9:8>  
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.  
www.austriamicrosystems.com Revision 1.13  
165 - 194  
 复制成功!