A43L2616B
Read & Write Cycle with Auto Precharge @Burst Length=4
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CLOCK
CKE
High
CS
RAS
CAS
RAa
RBb
CAa
CBb
ADDR
BA0
BA1
RAa
RBb
A10/AP
WE
DQM
DQ
(CL=2)
QAa0 QAa1 QAa2 QAa3
DDb0 DDb1 DDb2 DDb3
DDb0 DDb1 DDb2 DDb3
DQ
(CL=3)
QAa0 QAa1 QAa2 QAa3
Row Active
(A-Bank)
Auto Precharge
Start Point
(A-Bank/CL=3)
Auto Precharge
Start Point
(D-Bank)
Read with
Auto Precharge
(A-Bank)
Write with
Auto Precharge
(D-Bank)
Auto Precharge
Start Point
(A-Bank/CL=2)
Row Active
(D-Bank)
: Don't care
*Note : tRCD should be controlled to meet minimum tRAS before internal precharge start.
(In the case of Burst Length=1 & 2, BRSW mode)
(December, 2009, Version 1.3)
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AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
