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A43E26161 参数 Datasheet PDF下载

A43E26161图片预览
型号: A43E26161
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行低功耗同步DRAM [1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM]
分类和应用: 动态存储器
文件页数/大小: 44 页 / 1119 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43E26161  
10. Clock Suspend Exit & Power Down Exit  
1) Clock Suspend (=Active Power Down) Exit  
CLK  
2) Power Down (=Precharge Power Down) Exit  
CLK  
CKE  
CKE  
t
SS  
t
SS  
Note 2  
Note 1  
Internal  
CLK  
Internal  
CLK  
NOP  
ACT  
RD  
CMD  
CMD  
11. Auto Refresh & Self Refresh  
Note 3  
1) Auto Refresh  
CLK  
Note 4  
Note 5  
CKE  
PRE  
Internal  
CLK  
AR  
CMD  
CMD  
t
RP  
tRC  
Note 6  
2) Self Refresh  
CLK  
Note 4  
CMD  
CKE  
PRE  
SR  
CMD  
t
RP  
tRC  
* Note : 1. Active power down : one or more bank active state.  
2. Precharge power down : both bank precharge state.  
3. The auto refresh is the same as CBR refresh of conventional DRAM.  
No precharge commands are required after Auto Refresh command.  
During tRC from auto refresh command, other command can not be accepted.  
4. Before executing auto/self refresh command, both banks must be idle state.  
5. MRS, Bank Active, Auto/Self Refresh, Power Down Mode Entry.  
6. During self refresh mode, refresh interval and refresh operation are performed internally.  
After self refresh entry, self refresh mode is kept while CKE is LOW.  
During self refresh mode, all inputs expect CKE will be don’t cared, and outputs will be in Hi-Z state.  
During tRC from self refresh exit command, any other command can not be accepted.  
Before/After self refresh mode, burst auto refresh cycle (4K cycles ) is recommended.  
(December, 2004, Version 1.0)  
19  
AMIC Technology, Corp.  
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