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A25L40PMF-50U 参数 Datasheet PDF下载

A25L40PMF-50U图片预览
型号: A25L40PMF-50U
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位,低电压,串行闪存,具有50 MHz SPI总线接口 [8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface]
分类和应用: 闪存
文件页数/大小: 34 页 / 514 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A25L80P  
Deep Power-down (DP)  
Executing the Deep Power-down (DP) instruction is the only  
way to put the device in the lowest consumption mode (the  
Deep Power-down mode). It can also be used as an extra  
software protection mechanism, while the device is not in  
active use, since in this mode, the device ignores all Write,  
Program and Erase instructions.  
The Deep Power-down mode automatically stops at  
Power-down, and the device always Powers-up in the Standby  
mode.  
The Deep Power-down (DP) instruction is entered by driving  
S
Chip Select ( ) Low, followed by the instruction code on Serial  
S
Data Input (D). Chip Select ( ) must be driven Low for the  
S
Driving Chip Select ( ) High deselects the device, and puts  
entire duration of the sequence. The instruction sequence is  
shown in Figure 13.  
the device in the Standby mode (if there is no internal cycle  
currently in progress). But this mode is not the Deep  
Power-down mode. The Deep Power-down mode can only be  
entered by executing the Deep Power-down (DP) instruction, to  
reduce the standby current (from ICC1 to ICC2, as specified in DC  
Characteristics Table.).  
S
Chip Select ( ) must be driven High after the eighth bit of the  
instruction code has been latched in, otherwise the Deep  
Power-down (DP) instruction is not executed. As soon as Chip  
S
Select ( ) is driven High, it requires a delay of tDP before the  
supply current is reduced to ICC2 and the Deep Power-down  
mode is entered.  
Any Deep Power-down (DP) instruction, while an Erase,  
Program or Write cycle is in progress, is rejected without  
having any effects on the cycle that is in progress.  
Once the device has entered the Deep Power-down mode, all  
instructions are ignored except the Release from Deep  
Power-down and Read Electronic Signature (RES) instruction.  
This releases the device from this mode. The Release from  
Deep Power-down and Read Electronic Signature (RES)  
instruction also allows the Electronic Signature of the device to  
be output on Serial Data Output (Q).  
Figure 13. Deep Power-down (DP) Instruction Sequence  
S
tDP  
0
1
3
2
4
5
6
7
C
D
Instruction  
Stand-by Mode  
Deep Power-down Mode  
PRELIMINARY (May 2005, Version 0.0)  
18  
AMIC Technology Corp.  
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