A25L016 Series
Table 1. Protected Area Sizes
Status Register Content
Memory Protection
Addresses
BP2
0
BP1
0
BP0
0
Block(s)
None
Density
None
Portion
None
None
0
0
1
31
1F0000h – 1FFFFFh
1E0000h – 1FFFFFh
1C0000h – 1FFFFFh
180000h – 1FFFFFh
100000h – 1FFFFFh
000000h – 1FFFFFh
64KB
Upper 1/32
Upper 1/16
Upper 1/8
Upper 1/4
Upper 1/2
All
0
1
0
30 – 31
28 – 31
24 – 31
16 – 31
0 – 31
128KB
256KB
512KB
1MB
0
1
1
1
0
0
1
0
1
1
1
X
2MB
Note:
1. X = don’t care
2. The device is ready to accept a Chip Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.
(March, 2012, Version 2.0)
6
AMIC Technology Corp.