AMIS-710627-A4, AMIS-710628-A4, AMIS-710629-A4:
Data Sheet
600dpi CIS Modules
9.0 Reset Level and Video Sampling Time
Figure 3: Reset Level and Sample Time
Figure 3 shows the video signal waveform and details a single pixel. The signal output waveform is shown referenced to the input clock
waveform. Also shown is the terminology used to define the dark and bright output levels and the recommended pixels sampling times.
The dark level is defined by using the module imaging on a black target or with the light source turned off. The dark level is then
measured from ground or 0V. The reset level is a reference level of the reset switch, which is not necessarily at ground. The reason for
this is that after the reset operation, the video signal is passed through an amplifier, which may have some offsets. The difference
between the dark level and reset level is called the pedestal, PED. Hence, the reset level will sit below the dark level.
The video pixels, demonstrated in this graph, are ideal waveforms from a CIS module using a phototransistor imaging structure. The
video output at high speeds, such as 5.0MHz, does not instantly rise to its final value, although, if it is given enough time it would
eventually approach its steady state value (in order of milliseconds). However, at high speeds it is impractical to wait until a final stable
value is reached. The suggested sampling point is therefore a few nanoseconds prior to the signal falling edge.
AMI Semiconductor – Jan. 06, M-20493-001
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