AMIS-30624 I2C Microstepping Motordriver
Data Sheet
16.4.2. START and STOP Conditions
Within the procedure of the I2C-bus, unique situations arise, which are defined as START (S) and STOP (P) conditions (See Figure 26).
A HIGH to LOW transition on the SDA line while SCK is HIGH is one such unique case. This situation indicates a START condition.
LOW to HIGH transition on the SDA line while SCK is HIGH defines a STOP condition.
START and STOP conditions are always generated by the master. The bus is considered to be busy after the START condition. The
bus is considered to be free again a certain time after the STOP condition. The bus free situation is specified as tBUF in Table 6.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition. In this respect, the START (S) and repeated
START (Sr) conditions are functionally identical (See Figure 27). The symbol S will be used to represent START and repeated START,
unless otherwise noted.
START
STOP
SDA
SCK
PC20070217.3
START
condition
STOP
condition
Figure 26: START and STOP Conditions
16.5 Transferring Data
16.5.1. Byte Format
Every byte put on the SDA line must be 8-bits long. The number of bytes that can be transmitted per transfer to AMIS-30624 is
restricted to eight. Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB) first (See
Figure 27). If a slave can’t receive or transmit another complete byte of data, it can hold the clock line SCK LOW to force the master
into a wait state. Data transfer then continues when the slave is ready for another byte of data and releases clock line SCK.
START
STOP
SDA
MSB
Acknowledgement
signal from slave
Clock line held
low by slave
SCK
7
8
3-8
9
1
2
9
1
2
ACK
START
condition
STOP
condition
Aknowledge related
clock puse from master
PC20070217.4
Figure 27: Data Transfer on the I2C-bus
AMI Semiconductor – Apr. 2007, Rev 3.1, M-20664-003
41
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