AMIS-30623 LIN Microstepping Motordriver
Data Sheet
15.2.7. Autarkic functionality in under-voltage condition
Battery voltage management
The AMIS-30623 monitors the battery voltage by means of one threshold and one shutdown level, as illustrated in the state diagram
below. The only condition to reset flags <UV2> and <StepLoss> is to recover a battery voltage higher than UV1 and to receive a
GetStatusor a GetFullStatuscommand.
Normal voltage
UV2
> = ‘0’
StepLoss
- <
- <
Vbb < UV2
&
> = ‘0’
motion ongoin g
Vbb < UV2
(no motion)
Vbb > UV1
LIN frame:
GetStatus
&
or
GetFullStatus
Stop mode 1
UV2
Stop mode 2
- <
- <
> = ‘ ’
StepLoss
1
- <
- <
UV2
> = ‘ ’
1
StepLoss
> = ‘1’
> = ‘0’
HardStop
-
- Motor shutdown
(motion disabled)
- Motor shutdown
(motion disabled)
Figure 17: State Diagram Battery Voltage Management
Autarkic function
In Stop mode 1 the motor is put in shutdown state. The <UV2> flag is set. In case Vbb > UV1 AMIS-30623 accepts updates of the
target position by means of the reception of SetPosition, SetPositionShort, SetPosParam and GotoSecurePosition
commands, even if the <UV2> flag is NOT prior cleared.
In Stop mode 2 the motor is stopped immediately and put in shutdown state. The <UV2>and <Steploss>flags are set. In case Vbb
> UV1 AMIS-30623 autonomously resumes the motion to the original target position using the stored motor parameters (minimum and
maximum velocity, acceleration, step-mode, run- and hold current) in case no RAM reset occurred.
The flags are only cleared after receiving a GetStatusor GetFullStatuscommand.
Updates of the target position by means of the reception of SetPosition, SetPositionShort, SetPosParam and
GotoSecurePositioncommands is accepted, even if the <UV2> and <Steploss> flags are NOT prior cleared.
Important notes:
1. In the case of Stop mode 2 care needs to be taken because the accumulated steploss can cause a significant deviation
between physical and stored actual position.
2. The SetDualPositioncommand will only be executed after clearing the <UV2> and <Steploss> flags.
3. RAM reset occurs when Vdd < VddReset (digital Power On Reset level)
4. The Autarkic function remains active as long as Vdd > VddReset
Logical implementation Autarkic function
The logic uses the <UV2>, <CPFail> and <Steploss> signal NOT the state.
The state is set one clock after the signal and would therefore slow down the reaction time. Also the state can only be cleared after a
GetStatusor GetFullStatuscommand which prevents the autonomous function.
Only <UV2> and <CPFail> are applicable for finishing the motion to the original target position:
<UV2> needs to be cleared to leave the Shutdown State
<CPFail> needs to be cleared to avoid a new HardStopafter entering the GotoPosstate
AMI Semiconductor – June 2006, Rev 3.0
25
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