AMIS-30623 LIN Microstepping Motordriver
Data Sheet
Tsw =1024 µs
512 µs
DriveHS
DriveLS
t
t
Tsw_on = 128 µs
"R"-Comp
Rth
t
120 µs
SWI_Cmp
ESW
t
0
1
1
1
t
ActPos
t
Figure 15: Timing diagram showing the change in states for SWI comparator
15.2 Main Control and Register, OTP memory + ROM
15.2.1. Power-up Phase
Power up phase of the AMIS-30623 will not exceed 10ms. After this phase, the AMIS-30623 is in shutdown mode, ready to receive LIN
messages and execute the associated commands. After power-up, the registers and flags are in the reset state, some of them being
loaded with the OTP memory content (see Table 22: RAM registers).
15.2.2. Reset State
After power-up, or after a reset occurrence (e.g. a micro cut on pin VBB has made Vdd to go below VddReset level), the H-bridges will
be in high impedance mode, and the registers and flags will be in a predetermined position. This is documented in Table 22: RAM
registers and Table 23: Flags Table.
15.2.3. Soft Stop
A soft stop is an immediate interruption of a motion, but with a deceleration phase. At the end of this action, the register TagPos is
loaded with the value contained in register ActPos to avoid an attempt of the circuit to achieve the motion (see Table 22: RAM
registers). The circuit is then ready to execute a new positioning command, provided thermal and electrical conditions allow for it.
AMI Semiconductor – June 2006, Rev 3.0
23
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