TYPICAL POWER NUMBERS
Power Requirements Under Different Power Management Modes
Table 34 shows the maximum and typical power dissipation for the ÉlanSC400 and ÉlanSC410 microcontrollers.
Table 34. Power Estimates
Power Management Mode (CPU Clock Speed)
Hyper-Speed1
(100 MHz)
Hyper-Speed1
(66 MHz)
High-Speed2
(33 MHz)
Low-Speed3
(~4 MHz)
Standby4
(0 MHz)
Off5
Maximum at 3.3 V
Typical at 3.3 V
2194 mW
(~665 mA)
1527 mW
(~463 mA)
879 mW
(~266 mA)
240 mW
(~73 mA)
63 mW
(~19 mA)
33 µW
(10 µA)
1818 mW
(551 mA)
1222 mW
(~370 mA)
703 mW
(~213 mA)
192 mW
(~58 mA)
50 mW
(~15 mA)
16 µW
(4.8 µA)
Maximum at 2.7 V
Typical at 2.7 V
N/A
N/A
941 mW
753 mW
586 mW
469 mW
144 mW
115 mW
60 mW
48 mW
33 µW
16 µW
Notes:
1. Hyper-Speed mode is defined with a CPU clock frequency of 66 or 100 MHz. There is a time penalty to engage and disengage
Hyper-Speed mode, because a CPU Stop Clock/Stop Grant sequence is required to “arbitrate” the internal CPU PLL start-
up, cache flush, and the clearing of all internal pipelines and write buffers. The DX2 mode (66 MHz) is a clock-doubled mode
with the CPU operating at 66 MHz and the rest of the system logic operating at 33 MHz. The DX4 mode (100 MHz) is a clock
tripled mode with the CPU running at 100 MHz and the rest of the system running at 33 MHz.
2. High-Speed mode is defined with a maximum CPU clock speed of 33 MHz with a 1x dynamic clock-speed change control
capability. Dynamic clock control allows fast, unarbitrated CPU clock-speed changes. Table 34 assumes a CPU frequency of
33 MHz and that the internal LCD controller is enabled. Other High-Speed mode power estimates with CPU VCC = 3.3 V are
shown below:
CPU Clock = 33 MHz/2 = 16.5 MHz, Max = 601 mW, Typical = 480 mW
CPU Clock = 33 MHz/4 = 8.25 MHz, Max = 370 mW, Typical = 296 mW
3. Low-Speed mode limits the maximum CPU clock frequency to 8 MHz. Table 34 assumes 8 MHz/2 = ~4.125 (CPU speed) and
that the Internal LCD controller is enabled. Other Low-Speed power estimates with CPU at 3.3 V are shown below:
8 MHz/1 = 8.25 MHz, Max = 370 mW, Typical = 296 mW
8 MHz/4 = 2.06 MHz, Max = 164 mW, Typical = 132 mW
4. Standby mode is defined as having the CPU idle and stopped (0 MHz), but video screen refresh continues. IRQ0 (DOS Timer
IRQ source) is assumed to be programmed as an activity and is generated at a rate of 60 Hz. This causes the PMU to tran-
sition to the Temporary Low-Speed mode where the CPU is clocked at 8 MHz. The assumed duration of the IRQ0 handler
routine is 25 µs and, upon the interrupt return instruction, the PMU immediately re-enters the Standby mode, the LCD con-
troller is enabled, and DRAM refresh type is slow CAS-before-RAS.
5. Off is defined as the VCC_RTC supply pin having power applied and all other VCC pins are not powered. In this mode, the
core CPU, power management unit, PLLs, etc. have no power applied. The RTC will have an internally isolated power plane
and source its power from the VCC_RTC supply pin.
88
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
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