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ELANSC400-66AC 参数 Datasheet PDF下载

ELANSC400-66AC图片预览
型号: ELANSC400-66AC
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片,低功耗, PC / AT兼容的微控制器 [Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers]
分类和应用: 微控制器PC
文件页数/大小: 132 页 / 2249 K
品牌: AMD [ AMD ]
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tages of an integrated local-bus interface and frame  
and font buffers that are shared with main memory. The  
graphics controller is not supported on the ÉlanSC410  
microcontroller.  
The following graphics mode features are supported:  
640 x 200 1 bit-per-pixel, CGA-compatible graphics  
buffer memory map  
320 x 200 2 bits-per-pixel, CGA-compatible graph-  
The graphics controller includes the following features:  
ics buffer memory map  
Supports multiple panel resolutions  
640 x 480 2 bits-per-pixel, flat memory map (lower  
resolutions supported)  
Provides internal unified memory architecture  
(UMA) with optional write-through caching of  
graphics buffers  
640 x 480 1 bit-per-pixel, flat memory map  
1, 2, or 4 bits-per-pixel packed-pixel flat-mapped  
graphics up to 640 x 240/480 x 320 with two map-  
ping modes:  
Stores frame and font buffer data in system DRAM,  
eliminates extra memory chip  
Provides software compatibility with Color Graphics  
Adapter (CGA), Monochrome Display Adapter  
(MDA), and Hercules Graphics Adapter (HGA) text  
and graphics  
– 16-Kbyte window with bank swapping to ad-  
dress up to 64 Kbyte of graphics frame buffer  
while consuming only 16 Kbyte of DOS/Real-  
mode CPU address space  
Supports single-scan or dual-scan monochrome  
– Direct-mapped (no bank swapping) with locat-  
able base address, up to 128-Kbyte direct ad-  
dressability  
LCD panels with 4-bit or 8-bit data interface  
Typical panels supported include:  
– 640 x 200, 640 x 240, 640 x 480, 480 x 320,  
480 x 240, 480 x 128, 320 x 200, 320 x 240  
Hercules Graphics mode emulation (HGA)  
JTAG Test Features  
– Other resolutions can be supported  
The ÉlanSC400 and ÉlanSC410 microcontrollers pro-  
vide a boundary-scan interface based on the IEEE Std  
1149.1, Standard Test Access Port and Boundary-  
Scan Architecture. The test access port provides a  
scan interface for testing the microcontroller and sys-  
tem hardware in a production environment. It contains  
extensions that allow a hardware-development system  
to control and observe the microcontroller without inter-  
posing hardware between the microcontroller and the  
system.  
Supports single-scan color STN panels with 8-bit  
interface, same resolutions as monochrome mode  
Internal local-bus interface provides high perfor-  
mance  
Logical screen can be larger than physical window.  
Supports panning and scrolling  
Supports horizontal dot doubling and vertical line  
doubling  
System Interfaces  
The following MDA/CGA-compatible text mode fea-  
tures are supported:  
Data Buses  
The ÉlanSC400 and ÉlanSC410 microcontrollers pro-  
vide 32 bits of data that are divided into two separate  
16-bit buses.  
40, 64, or 80 columns with characters 16, 10, or 8  
pixels wide  
Variable height characters up to 32 lines  
System Data Bus: The system (or peripheral) data  
bus (SD15–SD0) is always 16 bits wide and is  
shared between ISA, 8-bit or 16-bit ROM/Flash  
memory, and PC Card peripherals (ÉlanSC400  
microcontroller only). It can be directly connected to  
all of these devices. In addition, these signals are  
the upper word of the VESA local (VL) data bus, the  
32-bit DRAM interface, and the 32-bit ROM  
interface.  
Variable width characters—8, 10, or 16 pixels  
MDA Monochrome, or CGA 4 gray shades, 16 gray  
shades, or 16-colors  
16-Kbyte downloadable font area, relocatable on  
16-Kbyte boundaries within lower 16 Mbytes of  
system DRAM (can be write protected)  
16-Kbyte frame buffer, relocatable on either  
16-Kbyte boundaries within lower 16 Mbyte of  
system DRAM (CGA-compatible mode) or 32-Kbyte  
boundaries when the frame buffer is larger than 16  
Kbyte (flat-mapped mode)  
Data Bus: The D15–D0 data bus is used during  
16-bit DRAM cycles. For 32-bit DRAM, VL-bus, and  
ROM cycles, this bus is combined with the system  
data bus. In other words, the data bus signals  
(D31–D16) are shared with the system data bus  
signals SD15–SD0.  
18  
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet