t19
t15
t18
IOR
t13
t13
PPDWE
PPOEN
STRB
t14
t14
t10
t10
SLCTIN
AFDT
Address Register Access
Data Register Access
t14
t14
t16
SD7–SD0
t17
BUSY
t21
t20
DBUFOE
DBUFRDL
Figure 49. EPP Parallel Port Read Cycle
Table 41. General-Purpose Input/Output Cycles
33-MHz External Bus
Symbol
Parameter Description
Unit
Min
Max
10
10
5
t1
t2
SA stable to GPIO_CSx rising edge
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SA stable to GPIO_CSx falling edge
t3
IOW rising edge to GPIO_CSx rising edge
IOW falling edge to GPIO_CSx falling edge
IOR rising edge to GPIO_CSx rising edge
IOR falling edge to GPIO_CSx falling edge
SA stable to GPIO_CSx (8042CS) falling edge
SA stable to GPIO_CSx (8042CS) rising edge
SA stable to GPIO_CSx (MEMCS) falling edge
SA stable to GPIO_CSx (MEMCS) rising edge
MEMW rising edge to GPIO_CSx rising edge
MEMW falling edge to GPIO_CSx falling edge
MEMR rising edge to GPIO_CSx rising edge
MEMR falling edge to GPIO_CSx falling edge
t4
5
t5
5
t6
5
t7
10
10
10
10
5
t8
t9
t10
t11
t12
t13
t14
5
5
5
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
115
AMD [ AMD ]
