Offset 10h 106
Offset 14h 107
Offset 2Ch 107
Offset 2Eh 107
Offset 30h 108
Offset 34h 108
Offset 3Ch 108
Offset 3Dh 109
PCI Device ID Register 102
PCI Device ID Register Offset 02h 102
PCI Expansion ROM Base Address Register 108
PCI Header Type Register 106
PCI Header Type Register Offset 0Eh 106
PCI I/O Base Address Register 106
PCI I/O Base Address Register Offset 10h 106
PCI I/O Buffer Power (9 Pins) 32
PCI Interface 26
Offset 3Eh 109
Offset 3Fh 109
Offset 40h 109
Offset 41h 109
Offset 42h 109
Offset 44h 110
Offset 46h 111
Offset 47h 111
PCI Interrupt Line Register 108
PCI Interrupt Line Register Offset 3Ch 108
PCI Interrupt Pin Register 109
PCI Latency Timer Register 106
PCI MAX_LAT Register 109
PCI Memory Mapped I/O Base Address Register
107
OnNow Functional Diagram 88
OnNow Pattern Match Mode 88
OnNow Wake-Up Sequence 87
Operating Ranges 220
ordering information 25
Other Data Registers 91
Outline of LAPP Flow 1
Output and Float Delay Timing 222
Output Tri-State Delay Timing 231
Output Tri-state Delay Timing 231
Output Valid Delay Timing 231
P
PCI MIN_GNT Register 109
PCI Next Item Pointer Register 109
PCI Next Item Pointer Register Offset 41h 109
PCI PMCSR Bridge Support Extensions Register
111
PCI PMCSR Bridge Support Extensions Register
Offset 46h 111
PCI Power Management Capabilities Register
(PMC) 109
PCI Power Management Control/Status Register
(PMCSR) 110
PCI Programming Interface Register 105
PCI Programming Interface Register Offset 09h
105
PADR 199
PAR 27
Parity 27
Parity Error 27
PCI Revision ID Register 105
PCI Status Register 104
Parity Error Response 41, 49
Pattern Match RAM 90
Pattern Match RAM (PMR) 88
PCI and JTAG Configuration Information 36
PCI Base-Class Register Offset 0Bh 106
PCI Bus Interface Pins - 3.3 V Signaling 220
PCI Bus Interface Pins - 5 V Signaling 220
PCI Bus Power Management Interface specifica-
tion 2
PCI Status Register Offset 06h 104
PCI Sub-Class Register 105
PCI Sub-Class Register Offset 0Ah 105
PCI Subsystem ID Register 107
PCI Subsystem Vendor ID Register 107
PCI Vendor ID Register 102
PCI Vendor ID Register Offset 00h 102
PECL 225
PERR 27
PCI Capabilities Pointer Register 108
PCI Capability Identifier Register 109
PCI Command Register 103
PCI Command Register Offset 04h 103
PCI Configuration Registers 95, 101, 102, 207
PCI Configuration Space Layout 95
PCI Data Register 111
PCI Data Register Offset 47h 111
PG 28
PHY Control and Management Block (PCM
Block) 81
PHY Select Programming 158
PHY/MAC Interface 74
PHY_RST 31
PHYSICAL DIMENSIONS 236
Physical Layer Devices (Multi-Port) 15
8
Am79C978
AMD [ AMD ]
