AMD
P R E L I M I N A R Y
MEMORY BUS WRITE ACCESS
Parameter
Symbol
Parameter Description
Test Conditions
Min
2
Max
100
100
100
Unit
ns
tmAD
MA[16:0] valid from CLKIN ↓
CE active delay from CLKIN ↓
tmCD
tmWD
tmCQ
tmCV
Note 1
2
ns
MWE active delay from CLKIN ↓
MD[7:0] driven from CLKIN ↓
MD[7:0] valid from CLKIN ↓
Address Setup Time to MWE ↓
2
ns
2
ns
100
ns
tmAS
TCLKIN-20
ns
tmAW
Address Write Access Time
(Note 3)
0 wait states
1 wait state
2 wait states
160
260
360
ns
ns
ns
tmCW
tmWP
CE Write Access Time
(Notes 1, 3)
0 wait states
1 wait state
2 wait states
160
260
360
ns
ns
ns
MWE Write Access Time
(Note 3)
0 wait states
1 wait state
2 wait states
150
250
350
ns
ns
ns
tmWQ
tmAH
tmCH
tmWI
MWE ↓ to MD[7:0] driven
MA[16:0] valid hold from MWE ↑
CE valid hold from MWE ↑
CE Inactive Time
–10
TCLKIN-10
TCLKIN-10
0
ns
ns
ns
ns
Note 1
Note 1, 2
tmSW
MD[7:0] valid setup to MWE ↑
0 wait states
1 wait state
2 wait states
130
230
330
ns
ns
ns
tmHW
MD[7:0] valid hold from MWE ↑
MD[7:0] inactive from MWE ↑
Note 2
Note 2
TCLKIN-15
ns
ns
tmHWZ
2 X TCLKIN-10 2 X TCLKIN+10
Notes:
1. CE = one of: FCE, SCE, XCE
2. Parameter not included in the production test.
3. Value is dependent upon TCLKIN value. Value given is for CLKIN = 20 MHz.
140
Am79C930