P R E L I M I N A R Y
If RESET# is asserted during a program or erase
Embedded Algorithms). The system can read
data tRH after the RESET# pin returns to VIH.
operation, the RY/BY# pin remains a “0” (busy)
until the internal reset operation is complete,
which requires a time of tREADY (during
Embedded Algorithms). The system can thus
monitor RY/BY# to determine whether the reset
operation is complete. If RESET# is asserted
when a program or erase operation is not exe-
cuting (RY/BY# pin is “1”), the reset operation
is completed within a time of tREADY (not during
Refer to the AC Characteristics tables for
RESET# parameters and to Figure 1 for the
timing diagram.
Output Disable Mode
When the OE# input is at VIH, output from the
device is disabled. The output pins are placed in
the high impedance state.
Table 2. Am29LV800DT Top Boot Block Sector Addresses
Address Range (in hexadecimal)
Sector Size
(Kbytes/
Kwords)
(x8)
(x16)
Sector A18 A17 A16 A15 A14 A13 A12
Address Range Address Range
SA0
SA1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
32/16
8/4
00000h–0FFFFh
10000h–1FFFFh
20000h–2FFFFh
30000h–3FFFFh
40000h–4FFFFh
50000h–5FFFFh
60000h–6FFFFh
70000h–7FFFFh
80000h–8FFFFh
90000h–9FFFFh
A0000h–AFFFFh
B0000h–BFFFFh
C0000h–CFFFFh
00000h–07FFFh
08000h–0FFFFh
10000h–17FFFh
18000h–1FFFFh
20000h–27FFFh
28000h–2FFFFh
30000h–37FFFh
38000h–3FFFFh
40000h–47FFFh
48000h–4FFFFh
50000h–57FFFh
58000h–5FFFFh
60000h–67FFFh
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
D0000h–DFFFFh 68000h–6FFFFh
E0000h–EFFFFh
F0000h–F7FFFh
F8000h–F9FFFh
70000h–77FFFh
78000h–7BFFFh
7C000h–7CFFFh
8/4
FA000h–FBFFFh 7D000h–7DFFFh
FC000h–FFFFFh 7E000h–7FFFFh
16/8
12
Am29LV800D
Am29LV800D_00_A4_E January 21, 2005
AMD [ AMD ]
