INDEX
A
C
A17/PIO7, 30
A18/PIO8, 30
A19/PIO9, 30
chip-select
low memory, 51
overlap, 51
timing, 49
unit, 49
absolute maximum ratings, 60
active mode
upper memory, 51
clock waveforms, 95
chip-selects
AD15–AD8, 30
AD7–AD0, 30
midrange memory, 51
peripheral, 52
address bus
CLKOUTA, 31
Am186ER
CLKOUTB, 31
disable in effect, 42
normal operation, 42
Am188ER
clock (25 MHz), 92
clock (33 MHz), 93
clock (40 and 50 MHz), 94
disable in effect, 43
clock and power management, 44
ALE, 31
clock frequencies
alphabetic PIO pin assignments, 36
minimum and maximum, 44
ambient temperatures
clock generation, 14
clock organization, 48
ambient, 62
PQFP with four-to-six layer board, 65
PQFP with two-layer board, 63
TQFP with four-to-six layer boards, 66
TQFP with two-layer board, 64
clock source
crystal driven, 45
clock waveforms
active mode, 95
AO15–AO8, 30
application considerations, 14
ARDY, 31
power-save mode, 95
clocking modes, 39
asynchronous ready waveforms, 97
asynchronous serial port, 56
commercial operating ranges, 60
comparison
Am186ER and 80C186 microcontrollers, 15
crystal
selecting, 45
B
crystal-driven clock source, 45
BHE/ADEN, 31
customer support, 13
block diagram
Am186ER, 2
Am188ER, 3
documentation and literature, 13
hotline and web, 13
literature ordering, 13
third-party development support products, 13
web home page, 13
bus cycle encoding, 37
bus hold waveforms
entering, 101
leaving, 101
bus interface unit, 41
bus operation, 41
byte write enables, 41
Am186™CC Communications Controller Data Sheet
Index-1
AMD [ AMD ]
