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AM188EMLV-33KC/W 参数 Datasheet PDF下载

AM188EMLV-33KC/W图片预览
型号: AM188EMLV-33KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 80C186- / 80C188兼容和80L186- / 80L188兼容的16位嵌入式微控制器 [High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 98 页 / 1582 K
品牌: AMD [ AMD ]
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P R E L I M I N A R Y  
PROGRAMMABLE I/O (PIO) PINS  
There are 32 pins on the Am186EM and Am188EM mi-  
crocontrollers that are available as user multipurpose  
signals. Table 2 and Table 3 on page 30 list the PIO  
pins. Each of these pins can be used as a user-pro-  
grammable input or output signal if the normal shared  
function is not needed.  
If a pin is enabled to function as a PIO signal, the pre-  
assigned signal function is disabled and does not affect  
the level on the pin. A PIO signal can be configured to  
operate as an input or output with or without a weak  
pullup or pulldown, or as an open-drain output.  
After power-on reset, the PIO pins default to various  
configurations. The column titled Power-On Reset Sta-  
tus in Table 2 and Table 3 on page 30 lists the defaults for  
the PIOs. The system initialization code must reconfigure  
the PIOs as required.  
The A19–A17 address pins default to normal operation  
on power-on reset, allowing the processor to correctly  
begin fetching instructions at the boot address  
FFFF0h. The DT/R, DEN, and SRDY pins also default to  
normal operation on power-on reset.  
Note that emulators use A19, A18, A17, S6, and UZI.  
If the AD15–AD0 bus override is enabled on power-on  
reset, then S6/CLKDIV2 and UZI revert to normal opera-  
tion instead of PIO input with pullup. If BHE/ADEN (186)  
or RFSH2/ADEN (188) is held Low during power-on reset  
the AD15–AD0 bus override is enabled.  
50  
Am186/188EM and Am186/188EMLV Microcontrollers  
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