P R E L I M I N A R Y
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges
Ready and Peripheral (33 MHz and 40 MHz)
Preliminary
Parameter
Description
Ready and Peripheral Timing Requirements
33 MHz
Min
40 MHz
Min
No. Symbol
Max
Max Unit
47
48
49
tSRYCL SRDY Transition Setup Time(a)
tCLSRY SRDY Transition Hold Time(a)
8
3
8
5
2
5
ns
ns
ns
tARYCH ARDY Resolution Transition
Setup Time(b)
50
51
52
53
54
tCLARX ARDY Active Hold Time(a)
tARYCHL ARDY Inactive Holding Time
tARYLCL ARDY Setup Time(a)
4
6
3
5
5
5
5
ns
ns
ns
ns
ns
10
8
tINVCH
tINVCL
Peripheral Setup Time(b)
DRQ Setup Time(b)
8
Peripheral Timing Responses
55
tCLTMV Timer Output Delay
15
12
ns
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA, unless otherwise noted. All output test conditions
are with CL=50 pF. For switching tests, VIL=0.45 V and VIH=2.4 V, except at X1 where VIH=VCC– 0.5 V.
a
b
This timing must be met to guarantee proper operation.
This timing must be met to guarantee recognition at the clock edge.
Synchronous Ready Waveforms
Case 1
Case 2
Case 3
Case 4
tW
t3
t2
t1
tW
tW
t3
tW
tW
tW
t3
t4
t4
t4
t4
t2
CLKOUTA
SRDY
47
48
Am186/188ES and Am186/188ESLV Microcontrollers
93
AMD [ AMD ]
