D A T A S H E E T
AC CHARACTERISTICS
Table 15. Alternate CE# Controlled Erase/Program Operations
Parameter
JEDEC
Speed Options
Std
tWC
tAS
Description
-90
-100
-120
-150
Unit
ns
tAVAV
tAVEL
tELAX
tDVEH
tEHDX
Write Cycle Time (Note 1)
Address Setup Time
Address Hold Time
Data Setup Time
Min
Min
Min
Min
Min
Min
90
100
120
150
0
ns
tAH
45
45
50
50
60
60
70
70
ns
tDS
ns
tDH
tOES
Data Hold Time
0
0
ns
Output Enable Setup Time
ns
Read Recovery Time Before Write
(OE# High to WE# Low)
tGHEL
tGHEL
Min
0
ns
tWLEL
tEHWH
tELEH
tEHEL
tWS
tWH
tCP
WE# Setup Time
WE# Hold Time
Min
Min
Min
Min
Typ
Typ
Typ
0
0
ns
ns
ns
ns
CE# Pulse Width
CE# Pulse Width High
45
50
60
70
tCPH
30
5
Byte
Programming Operation
(Notes 1, 2)
tWHWH1
tWHWH1
µs
Word
7
tWHWH2
tWHWH2 Sector Erase Operation (Notes 1, 2)
0.7
sec
Notes:
1. Not 100% tested.
2. See the “Erase and Programming Performance” section for more information.
January 23, 2007 27546A6
Am29SL800D
37
AMD [ AMD ]
