Revision 1.02 – June 27, 2006
S5935 – PCI Product
Data Book
This register provides for overall control of the Add-On
portion of this device. It is used to provide a method to
perform software resets of the mailbox and FIFO flags.
ADD-ON GENERAL CONTROL/STATUS
REGISTER (AGCSTS)
The following Add-On controls are provided:
Add-On General Control and Status
3Ch
Register Name
•
•
•
•
Reset PCI to Add-On FIFO flags
Reset Add-On to PCI FIFO flags
Reset mailbox empty full status flags
Write/read external non-volatile memory.
Add-On
Address Offset
000000F4h (PCI initiated bus master-
ing) 00000034h (Add-On initiated bus
mastering)
Power-up value
The following status flags are provided to the Add-On:
•
•
Add-On to PCI FIFO FULL
Read/Write, Read Only, Write Only
32 bits
Attribute
Size
Add-On to PCI FIFO has four or more empty
locations
•
•
•
Add-On to PCI FIFO EMPTY
PCI to Add-On FIFO FULL
PCI to Add-On FIFO has four or more words
loaded
•
PCI to Add-On FIFO EMPTY
Figure 36. Add-On General Control/Status Register
Bit
0
31
292827 252423
0
16 15
12 11
756
0
Value
FIFO STATUS (RO)
nvRAM Access Ctrl
D5=PCI to Add-on FIFO Empty
D4=PCI to Add-on 4+ Spaces
D3=PCI to Add-on FIFO Full
D2=Add-on to PCI FIFO Empty
D1=Add-on to PCI FIFO 4+ Words
D0=Add-on to PCI FIFO Full
Transfer Count
Enable
Reset Controls
D27=Mailbox Flags
D26=PCI to Add-on FIFO
Status Flags
D25=Add-on to PCI FIFO
Status Flags
D6=Read Transfer Count
Equals Zero (RO)
D7=Write Transfer Count
Equals Zero (RO)
nv operation
address/data
BIST Condition Code(R/W)
86
DS1527
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