Revision 1.02 – June 27, 2006
S5935 – PCI Product
Data Book
The following PCI bus controls are available:
MASTER CONTROL/STATUS REGISTER
(MCSR)
•
•
•
•
Write Priority over Read
Read Priority over Write
Write Transfer Enable
Master Control/Status
3Ch
Register Name
Write master requests on 4 or more FIFO
words available (full)
PCI Address
Offset
•
•
Read transfer enable
Read master requests on 4 or more FIFO avail-
able (empty)
000000E6h
Power-up value
Attribute
Read/Write, Read Only, Write
Only
•
•
•
•
•
Assert reset to Add-On
Reset Add-On to PCI FIFO flags
Reset PCI to Add-On FIFO flags
Reset mailbox empty full status flags
Write external non-volatile memory
Size32 bits
This register provides for overall control of this device.
It is used to enable bus mastering for both data direc-
tions as well as providing a method to perform
software resets.
The following PCI interface status flags are provided:
•
•
PCI to Add-On FIFO FULL
PCI to Add-On FIFO has four or more empty
locations
•
•
•
PCI to Add-On FIFO EMPTY
Add-On to PCI FIFO FULL
Add-On to PCI FIFO has four or more words
loaded
•
•
•
Add-On to PCI FIFO EMPTY
PCI to Add-On Transfer Count = Zero
Add-On to PCI Transfer Count = Zero
Figure 31. Bus Master Control/Status Register
Control
Status
Bit
31
29
27
24 23
16 15 14
0
12
10
8 7
6 5
0
0
0
Value
FIFO STATUS (RO)
nvRAM Access Ctrl
D5=Add-on to PCI FIFO Empty
D4=Add-on to PCI FIFO 4+ Words
D3=Add-on to PCI FIFO Full
D2=PCI to Add-on FIFO Empty
D1=PCI to Add-on FIFO 4+Spaces
D0=PCI to Add-on FIFO Full
Reset Controls (R/WC)
D27=Mailbox Flags Reset
D26=Add-on to PCI FIFO
Status Flags Reset
D25=PCI to Add-on FIFO
Status Flags Reset
D24=Add-On Reset
D7=Add-on to PCI Transfer Count
equals zero (R0)
D6=PCI to Add-on Transfer Count
equals zero (R0)
nv operation
address/data
Write Transfer Control (R/W)
(PCI memory writes)
D10=Write Transfer Enable
D9=FIFO Management Scheme
D8=Write vs Read Priority
Memory Read Multiple
Enable = 1
Disable = 0
Read Transfer Control (R/W)
(PCI memory reads)
D14=Read Transfer Enable
D13=FIFO Management Scheme
D12=Read vs. Write Priority
72
DS1527
AMCC Confidential and Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
