Revision 1.02 – June 27, 2006
S5935 – PCI Product
Data Book
TABLE OF CONTENTS
FEATURES .............................................................................................................................................................. 3
APPLICATIONS ...................................................................................................................................................... 3
DESCRIPTION ........................................................................................................................................................ 3
TABLE OF CONTENTS .......................................................................................................................................... 4
LIST OF FIGURES .................................................................................................................................................. 9
LIST OF TABLES .................................................................................................................................................. 12
S5935 ARCHITECTURE ....................................................................................................................................... 14
S5935 Register Architecture ............................................................................................................................ 14
PCI Configuration Registers ............................................................................................................................ 15
PCI Operation Registers .................................................................................................................................. 15
Add-On Bus Operation Registers .................................................................................................................... 16
Non-Volatile Memory Interface ........................................................................................................................ 16
Mailbox Operation ........................................................................................................................................... 17
Pass-Thru Operation ....................................................................................................................................... 19
FIFO PCI Bus Mastering Operation ................................................................................................................. 19
Signal Type Definition ...................................................................................................................................... 23
NON-VOLATILE MEMORY INTERFACE SIGNALS ............................................................................................ 27
ADD-ON BUS INTERFACE SIGNALS .................................................................................................................. 28
PCI CONFIGURATION REGISTERS .................................................................................................................... 32
VENDOR IDENTIFICATION REGISTER (VID) ..................................................................................................... 34
DEVICE IDENTIFICATION REGISTER (DID) ....................................................................................................... 35
PCI COMMAND REGISTER (PCICMD) ................................................................................................................ 36
PCI STATUS REGISTER (PCISTS) ...................................................................................................................... 38
REVISION IDENTIFICATION REGISTER (RID) ................................................................................................... 40
CLASS CODE REGISTER (CLCD) ....................................................................................................................... 41
CACHE LINE SIZE REGISTER (CALN) ............................................................................................................... 45
LATENCY TIMER REGISTER (LAT) .................................................................................................................... 46
HEADER TYPE REGISTER (HDR) ....................................................................................................................... 47
BUILT-IN SELF-TEST REGISTER (BIST) ............................................................................................................ 48
BASE ADDRESS REGISTERS (BADR) ............................................................................................................... 49
Determining Base Address Size ...................................................................................................................... 49
Assigning the Base Address ............................................................................................................................ 49
EXPANSION ROM BASE ADDRESS REGISTER (XROM) ................................................................................. 53
INTERRUPT LINE REGISTER (INTLN) ................................................................................................................ 55
INTERRUPT PIN REGISTER (INTPIN) ................................................................................................................. 56
MINIMUM GRANT REGISTER (MINGNT) ............................................................................................................ 57
MAXIMUM LATENCY REGISTER (MAXLAT) ...................................................................................................... 58
OUTGOING MAILBOX REGISTERS (OMB) ........................................................................................................ 61
INCOMING MAILBOX REGISTERS (IMB) ........................................................................................................... 61
FIFO REGISTER PORT (FIFO) ............................................................................................................................. 61
PCI CONTROLLED BUS MASTER WRITE ADDRESS REGISTER (MWAR) ..................................................... 62
4
DS1527
AMCC Confidential and Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
