S5935 参数 Datasheet PDF下载

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ONTENTS

Introduction to the PCI Local Bus .........................................................................................................

S5935 Architecture ................................................................................................................................

S5935 Register Architecture .................................................................................................................

PCI Configuration Registers .................................................................................................................

PCI Operation Registers .......................................................................................................................

Add-On Bus Operation Registers .........................................................................................................

Non-Volatile Memory Interface ..............................................................................................................

Mailbox Operation .................................................................................................................................

Pass-Thru Operation .............................................................................................................................

FIFO PCI Bus Mastering Operation ......................................................................................................

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1-2

1-2

1-2

1-3

1-3

1-3

1-4

1-5

1-5

Signal Type Definition ........................................................................................................................... 2-9

Address and Data Pins – PCI Local Bus ............................................................................................ 2-10

PCI Bus Interface Signals ................................................................................................................... 2-10

System Pins – PCI Local Bus .............................................................................................................. 2-11

Interface Control Pins – PCI Bus Signal ................................................................................... 2-11

Arbitration Pins (Bus Masters Only) – PCI Local Bus .............................................................. 2-12

Error Reporting Pins – PCI Local Bus ..................................................................................... 2-12

Interrupt Pin – PCI Local Bus .................................................................................................. 2-12

Non-Volatile Memory Interface Signals ............................................................................................... 2-13

Serial nv Devices ..................................................................................................................... 2-13

Byte-Wide nv Devices ............................................................................................................. 2-13

Add-On Bus Interface Signals ............................................................................................................. 2-14

Register Access Pins ............................................................................................................... 2-14

FIFO Access Pins .................................................................................................................... 2-15

Pass-Thru Interface Pins ......................................................................................................... 2-15

System Pins ............................................................................................................................. 2-16

PCI Configuration Space Header ........................................................................................................

Vendor Identification Register (VID) ....................................................................................................

Device Identification Register (DID) ....................................................................................................

PCI Command Register (PCICMD) ....................................................................................................

PCI Status Register (PCISTS) ............................................................................................................

Revision Identification Register (RID) .................................................................................................

Class Code Register (CLCD) ..............................................................................................................

Cache Line Size Register (CALN) ......................................................................................................

Latency Timer Register (LAT) .............................................................................................................

Header Type Register (HDR) ..............................................................................................................

Built-in Self-Test Register (BIST) ........................................................................................................

Base Address Registers (BADR) ........................................................................................................

Expansion ROM Base Address Register (XROM) ..............................................................................

Interrupt Line Register (INTLN) ...........................................................................................................

Interrupt PIN Register (INTPIN) ..........................................................................................................

3-18

3-19

3-20

3-21

3-23

3-25

3-26

3-30

3-31

3-32

3-33

3-34

3-38

3-40

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