Revision 1.01 – September 21, 2005
S5920 – PCI Product
Data Book
Table 42. Reset Control Register ........................................................................................................................... 78
Table 43. ............................................................................................................................................................... 80
Table 44. Operation Registers - Add-On Interface ................................................................................................ 81
Table 45. Mailbox Empty/Full Status Register ....................................................................................................... 84
Table 46. Interrupt Control Status Register ........................................................................................................... 86
Table 47. Reset General Control/Status Register .................................................................................................. 88
Table 48. Pass-thru Configuration Register ........................................................................................................... 90
Table 49. Valid External Boot Memory Contents ................................................................................................... 92
Table 50. PC Compatible Expansion ROM ............................................................................................................ 99
Table 51. PCI Data Structure ............................................................................................................................... 101
Table 52. PCI Bus Commands ............................................................................................................................ 102
Table 53. Target Termination Type ...................................................................................................................... 107
Table 54. Byte Lane Steering for PCI Write (Add-On Read) ................................................................................ 135
Table 55. Byte Lane Steering for PCI Read (Add-On Write) ................................................................................ 135
Table 56. Showing Big Endian Conversion for 32-bit .......................................................................................... 138
Table 57. Big Endian conversion for a 16-bit bus. The S5920 drives D[15:0] only .............................................. 139
Table 58. Big Endian conversion for an 8-bit bus. The S5920 drives D[7:0] only ................................................ 139
Table 59. Absolute Maximum Stress Ratings ...................................................................................................... 149
Table 60. Operating Conditions ........................................................................................................................... 149
Table 61. PCI Signal DC Characteristics (V = 5.0V 5%, 0°C to 70°C, 50 pF load on outputs) ........................ 150
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Table 62. Add-On Operating Characteristics (V = 5.0V 5%, 0°C to 70°C, 50 pF load on outputs) .................. 151
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Table 63. Functional Operation Range
(V = 5.0V ± 5%, 0°C to 70°C, 50 pF load on outputs for MAX, 0 pF load for MIN) ................................... 152
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Table 64. Add-On Timings, Functional Operation Range
(V = 5.0 V ± 5%, 0°C to 7 0°C, 50 pF load on outputs for MAX, 0 pF load for MIN) ................................. 154
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Table 65. Add-On Timings
Functional Operation Range (V = 5.0 V ± 5%, 0°C to 70°C, 50 pF load on outputs for MAX, 0 pF load for MIN)
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158
Table 66. Mailbox Timings
Functional Operation Range (V = 5.0 V ± 5%, 0°C to 70°C, 50 pF load on outputs) ................................ 160
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