Revision 1.02 – April 12, 2007
S5920 – PCI Product: PCI Bus Protocol
Data Book
Figure 47. Burst PCI Bus Write of S5920 Registers
ing both STOP# and DEVSEL# while TRDY# is
deasserted. Figure 5 shows the behavior of the S5920
when performing a target-initiated retry.
1
2
3
4
5
PCLK
Figure 48. Figure 4a. Target Disconnect Example 1
(I)
(I)
FRAME#
AD[31:0]
C/BE[3:0]#
IRDY#
1
2
3
4
5
Address
Data 1
BE 1
Data 2
PCLK
Bus
Cmd
BE 2
(I)
FRAME#
IRDY#
(I)
(I)
(I)
(T)
(T)
(T)
(T)
(T)
(T)
TRDY#
DEVSEL#
STOP#
TRDY#
DEVSEL#
STOP#
Data
Transfered
(I) Driven by Initiator
(T) Driven by Target
No Data
Transfered
(I) Driven by Initiator
(T) Driven by Target
Target
Disconnect
Identified
Data
Transfered
Target-Initiated Termination
There are situations where the target may end a trans-
fer prematurely. This is called “target-initiated
termination.” Target termination falls into three catego-
ries: disconnect, retry, and target abort. Only the
disconnect termination completes a data transfer.
Figure 49. Figure 4b. Target Disconnect Example 2
1
2
3
4
5
PCLK
(I)
FRAME#
IRDY#
Target Disconnects
There are many situations where a target may discon-
nect. Slow responding targets may disconnect to
permit more efficient (faster) devices to be accessed
while they prepare for the next data phase. Or a target
may disconnect if it recognizes that the next data
phase in a burst transfer is out of its address range. A
target disconnects by asserting STOP#, TRDY#, and
DEVSEL# as shown in Figures 4a and 4b. The initiator
in Figure 4a responds to the disconnect condition by
deasserting FRAME# on the following clock but does
not complete the data transfer until IRDY# is asserted.
The timing diagram in Figure 4b also applies to the
S5920.
(I)
(T)
(T)
(T)
TRDY#
DEVSEL#
STOP#
Target
(I) Driven by Initiato
(T) Driven by Targe
Disconnect
Single Data
Transferred
Data
Transfered
Target Aborts
A target abort termination represents an error condi-
tion when no number of retries will produce a
successful target access. A target abort is uniquely
identified by the target deasserting DEVSEL# and
TRDY# while STOP# is asserted. When a target per-
forms an abort, it must also set bit 11 of its PCI Status
register (PCISTS). The S5920 never responds with a
target abort when accessed. Target termination types
are summarized in Table 2.
The S5920 performs a target disconnect if a burst
access is attempted to any of its PCI Operation/Con-
figuration Registers, or to the Expansion ROM.
Target Requested Retries
The S5920 initiates a retry for Pass-Thru writes when
the Write FIFO is full, and for Pass-Thru reads when
the Add-On cannot supply data within 16 PCI clocks
from the assertion of FRAME# (for the first data phase
of a burst). A retry is requested by a target by assert-
105
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