Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
Add-On General Control/status Register (AGCSTS)
The following Add-On controls are provided:
•
•
•
•
Reset PCI to Add-On FIFO flags
Add-On General Control and
Status
Register Name:
Reset Add-On to PCI FIFO flags
Reset mailbox empty full status flags
Write/read external non-volatile memory.
3Ch
Add-On Address Offset:
Power-up value:
000000F4h (PCI initiated bus
mastering) 00000034h (Add-
On initiated bus mastering)
The following status flags are provided to the Add-On:
•
•
Add-On to PCI FIFO FULL
Add-On to PCI FIFO has four or more empty
locations
Read/Write, Read Only, Write
Only
Attribute:
Size:
•
•
•
Add-On to PCI FIFO EMPTY
PCI to Add-On FIFO FULL
32 bits
PCI to Add-On FIFO has four or more words
loaded
•
PCI to Add-On FIFO EMPTY
This register provides for overall control of the Add-On
portion of this device. It is used to provide a method to
perform software resets of the mailbox and FIFO flags.
Figure 36. Add-On General Control/Status Register
Bit
0
31
292827 252423
0
16 15
12 11
765
0
Value
FIFO STATUS (RO)
nvRAM Access Ctrl
D5=PCI to Add-on FIFO Empty
D4=PCI to Add-on 4+ Spaces
D3=PCI to Add-on FIFO Full
D2=Add-on to PCI FIFO Empty
D1=Add-on to PCI FIFO 4+ Words
D0=Add-on to PCI FIFO Full
Transfer Count
Enable
Reset Controls
D27=Mailbox Flags
D26=PCI to Add-on FIFO
Status Flags
D25=Add-on to PCI FIFO
Status Flags
D6=Read Transfer Count
Equals Zero (RO)
D7=Write Transfer Count
Equals Zero (RO)
nv operation
address/data
BIST Condition Code (R/W)
AMCC Confidential and Proprietary
DS1657 80
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
