Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
Asynchronous RD# Register Access Timing
Table 66. Asynchronous RD# Register Access Timing
Functional Operation Range (V =3.3V ±5%, 0°C to 70°C, 50 pf load on outputs)
CC
Symbol
Parameter
Min
Max
Units
Notes
t
t
t
t
t
t
t
t
t
t
t
t
SELECT# Setup to RD# Rising Edge
10
-
ns
110
SELECT# Hold from RD# Rising Edge
ADR[6:2] Setup to RD# Rising Edge
ADR[6:2] Hold from RD# Rising Edge
BE[3:0]# Setup to RD# Rising Edge
BE[3:0]# Hold from RD# Rising Edge
RD# High Time
0
10
0
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
110a
114
-
114a
118
10
0
-
-
118a
129
130
133
133a
152
153
15
15
13
2
-
RD# Low Time
-
DQ[31:0] Valid from RD# Falling Edge
DQ[31:0] Hold from RD# Rising Edge
RDEMPTY Status Valid from RD# Rising Edge
FRF Status Valid from RD# Rising Edge
-
-
-
15
75
-
Note: For non-burst FIFO read/write operations
Figure 101. Asynchronous RD# FIFO Timing
t110
SELECT#
ADR[6:2]
BE[3:0]#
t114
t118
t133a
t133
DQ[31:0]
t129
t130
RD#
t152
5ns
RDEMPTY
T153
FRF
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