S3091 – SONET/SDH/ATM OC-192 16:1
Transmitter
S3091 OVERVIEW
The S3091 transmitter implements SONET/SDH seri-
alization and transmission functions. This chip can be
used to implement the front end of SONET equipment,
which consists primarily of the serial transmit interface
and the serial receive interface. The chip includes par-
allel-to-serial conversion and system timing. The
system timing circuitry consists of a high-speed phase
detector, clock dividers, and clock distribution through-
out the front end.
Revision A – February 22, 2002
DEVICE SPECIFICATION
The sequence of transmitter operations is as follows:
1. 16-bit parallel input
2. Parallel-to-serial conversion
3. Serial output
Internal clocking and control functions are transpar-
ent to the user. Details of data timing can be seen in
Figures 7 and 8.
Suggested Interface Devices
AMCC
AMCC
AMCC
AMCC
S3092
19201
19202
19203
OC-192 CDR+DeMUX
OC-192 to OC-48 MUX/DeMUX
OC-192 SONET/SDH Mapper
OC-192 Digital Wrapper
Figure 4. Functional Block Diagram
16
16:1 PARALLEL
TO SERIAL
D
TSDP/N
PINP/N[15:0]
PICLKP/N
PHINITP/N
CLKSEL
SKEWSEL[1:0]
2
TIMING
GEN
RSTB
PCLKP/N
PHERRP/N
TESTB
REFSEL
REFCLKP/N
CLOCK
DIVIDER and
PHASE DETECTOR
LOCKERRB
155MCKP/N
77MCKP/N
CAP1
CAP2
6