S3045
SONET/SDH OC-12 TO OC-48 MUX/DEMUX
Figure 19. AC Receiver Input Timing Diagram
311CLKINP
tS
tH
311O
311O
311DATIN[7:0]
Frame
Notes:
1. When a set-up time is specified on differential LVDS signals between an input and a clock, the set-up time is the time in nanoseconds from
the cross-over point of the input to the cross-over point of the clock.
2. When a hold time is specified on differential LVDS signals between an input and a clock, the hold time is the time in nanoseconds from the
cross-over point of the clock to the cross-over point of the input.
Table 16. AC Receiver Input Timing Characteristics
Symbol
Description
Min
40
Max Units
311CLKIN Duty Cycle
60
%
ns
ns
tS311O
tH311O
311DATIN[7:0] and Frame Set-up Time w.r.t. 311CLKINP
311DATIN[7:0] and Frame Hold Time w.r.t. 311CLKINP
0.8
0.8
Figure 20. AC Pulse Timing Diagram
311TCLKP
PULSEP/N
tS
tH
PS
PS
Table 17. AC Pulse Timing Characteristics
Symbol
Description
Min
Max Units
tSPS
tHPS
PULSEP/N Setup Time w.r.t. 311TCLKP
PULSEP/N Hold Time w.r.t. 311TCLKP
0.8
0.8
ns
ns
28
December 13, 1999 / Revision E
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
