S3015/S3016
E4/STM-1/OC-3 ATM INTERFACE CIRCUITS
S3016 Pin Assignment and Descriptions (Continued)
Pin Name
Level I/O
Pin # Description
LOSIN
Analog
I
18
Loss of signal in. A single-ended input that indicates a loss of
received signal. When the signal level at LOSIN drops below the
voltage level set by LOSREF for greater than 96 to 224 bit
intervals, the data on Serial Data Out (SERDATOP/N) will be
forced to a constant low, and the PLL will change its reference
from the serial data stream to the reference clock. This input is
to be driven by the external bandpass filter and peak detect
circuit as shown in Figure 17. This signal must be used to
assure correct automatic reacquisition to serial data following an
interruption and subsequent reconnection of the data path. This
will assure that the PLL does not "wander" out of reacquisition
range when no signal is applied. When LOSIN is inactive, data
on the SERDATIP/N pins will be processed normally.
LOSOPT
LOSREF
PECL
I
I
4
Loss of optical signal input, active low. It has the same
functionality as LOSIN, except that it is used in optical mode
instead of electrical. It should be driven by the external optical
receiver module to indicate a loss of received optical power.
Analog
19
Loss of signal reference that sets the comparator levels for
LOSIN. (See Table 6.)
CAP1
CAP2
–
I
1
52
The loop filter capacitor is connected to these pins. The
capacitor value should be 0.1µf ±10% tolerance, X7R dielectric.
50 V is recommended.
LOSOUT
TTL
O
5
Loss of signal out, active low. Clock recovery indicator. Set high
when the internal clock recovery has locked onto the incoming
datastream. LOSOUT is an asynchronous output. This output is
deasserted when there is no incoming serial data input or when
the received signal has dropped below the reference voltage set
by LOSREF for more than 96 to 224 bit intervals. In this case,
the PLL locks to the reference clock.
SERDATOP
SERDATON
Diff.
PECL
O
6
7
Serial NRZ data out signal. It can be either a delayed version of
the NRZ data input (NRZ mode) or the decoded CMI data (CMI
mode). SERDATOP/N is updated on the falling edge of
SERCLKOP/N per Figure 12.
SERCLKOP
SERCLKON
Diff.
O
O
28
29
Serial clock out signal that is phase-aligned with Serial Data Out
(SERDATOP). (See Figure 12 and Table 3 for timing.)
PECL
LCV
Single-
ended
PECL
31
Line code violation that is set high to indicate that the current bit
contains a CMI line code violation in CMI mode. LCV is updated
on the falling edge of SERCLKOP/N per Figure 12. In NRZ
mode, this is a test output.
12
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
