S2068
DUAL GIGABIT ETHERNET TRANSCEIVER
OUTPUT LOAD
Figure 19. High Speed Differential Inputs
The S2068 serial outputs require a resistive load to
set the output current. The recommended resistor
value is 4.5 kΩ to ground. This value can be varied
to adjust drive current, signal voltage swing, and
power usage on the board.
Vcc - 1.3 V
0.01 µf
ACQUISITION TIME
100 Ω
With the input eye diagram shown in Figure 21, the
S2068 will recover data with a ≤1E-9 BER within the
time specified by TLOCK in Table 18 after an instan-
taneous phase shift of the incoming data.
0.01 µf
Figure 20. Receiver Input Eye Diagram Jitter Mask
Figure 16. Serial Input/Output Rise and Fall Time
80%
50%
20%
80%
50%
20%
Bit Time
Tr
Tf
Amplitude
Figure 17. TTL Input/Output Rise and Fall Time
+2.0V
+0.8V
+2.0V
+0.8V
24%
Tr
Tf
Figure 18. Serial Output Load
Figure 21. Acquisition Time Eye Diagram
1.3
Vcc -1.3 V
1.0
0.01 µf
0.8
0.7
4.5 kΩ
4.5 kΩ
0.5
0.3
0.2
0.01 µf
0.0
Normalized Time
22
October 13, 2000 / Revision D
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
